Kirr
Newbie level 4
Hello everyone.
Now i'm working on unidirectional input pad with cold spare capability. That means i have to manage gate and well connections of PMOS ESD diode to exclude leakage current through drain-well and drain-source when Vcc is floating and Vpad>Vcc. Simultaneously there should be ESD-protection through PAD to VCC, i.e. opportunity to drain the current impulse to VCC.
I know how to resolve the first task with cold spare, but i don't really understand how to realize these two capabilities simultaneously, because in the first case we shouldn't drain the current through PAD->VCC but in the second we should.
Please help me to resolve this contradiction. Thanks in advance.
Now i'm working on unidirectional input pad with cold spare capability. That means i have to manage gate and well connections of PMOS ESD diode to exclude leakage current through drain-well and drain-source when Vcc is floating and Vpad>Vcc. Simultaneously there should be ESD-protection through PAD to VCC, i.e. opportunity to drain the current impulse to VCC.
I know how to resolve the first task with cold spare, but i don't really understand how to realize these two capabilities simultaneously, because in the first case we shouldn't drain the current through PAD->VCC but in the second we should.
Please help me to resolve this contradiction. Thanks in advance.