Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Distance of DC bias on CML output

Status
Not open for further replies.
M

mycw

Junior Member level 3
Junior Member level 3
Joined
Sep 29, 2010
Messages
30
Helped
2
Reputation
4
Reaction score
1
Trophy points
1,288
Activity points
1,500
Hello everyone,

As I know, usually people try to have the DC bias as close as possible for pulling up a CML output, but how close it should be? Is there any formula about it?


Thanks!
Mario Young
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top