mohan_arun
Newbie
I am designing a cross coupled rectifier (schematic attached) operating at a frequency of 953 MHz. After post layout (Layout photo also attached), I compare power conversion efficiency (PCE) and transient output voltage performance.
I find that the PCE performance of the post layout simulation is the same as pre-layout sim. However, the transient output voltage degrades in post-layout analysis.
Please help me in figuring out why it is so?
I find that the PCE performance of the post layout simulation is the same as pre-layout sim. However, the transient output voltage degrades in post-layout analysis.
Please help me in figuring out why it is so?