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That's a very common question here. Please do a forum search for keywords FPGA CPLD difference. Previous discussions probably contain the answer you need.
Hi,
Some differences i'm listing,
FPGAs,
Large no. of flipflops, i.e. sequential logic.
Volatile...need reprogramming on power up(sram based).
can have embeded processors, multipliers n on-chip rams.Also clock management is highly advanced.
for complex applications.
CPLDs,
More amount of combinatoional logic.
PAL based, Once programmed no need of reconfiguration unless design change.
Better predictable delays.
For small designs with large decoding logic and low power consumption.
FPGA:
a)SRAM based technology.
b)Segmented connection between elements.
c)Usually used for complex logic circuits.
d)Must be reprogrammed once the power is off.
e)Costly
CPLD:
a)Flash or EPROM based technology.
b)Continuous connection between elements.
c)Usually used for simpler or moderately complex logic circuits.
d)Need not be reprogrammed once the power is off.
e)Cheaper
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