Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Designing around ADC Noise

Status
Not open for further replies.

KD494

Member level 5
Member level 5
Joined
Jun 24, 2015
Messages
83
Helped
13
Reputation
26
Reaction score
13
Trophy points
1,288
Location
Boston, MA
Activity points
2,059
This is a bit of a long question so thanks in advance for any insight! I'm working with an inductive sensor that will under some conditions that I need to measure be giving me as little 200uVpp response. The sensor can operate to upwards of 20MHz so the cutoff frequency for any filters in my analog path are set around 30MHz (this bandwidth is a must). My circuit consists of a low noise front end amplifier (LT6230) stage and two variable gain stages (LTC6253) before finally an ADC driver (THS4524), anti-aliasing filter, and ADC (LTC2174-14). A simplified version of the beginning of this circuit is shown in the image below.

Analog Path.PNG

I should say that this circuit works very well for what I'm using it for but I'm sure it could be better. Up until this point I have controlled the gain in such a way that whatever signal level I currently have at the input should be amplified as close to full scale as possible to leverage the full range of the ADC. However I recently decided to do some more in depth noise analysis and came across something I never noticed before. The ADC has an SNR of 73.1dB which with a 2Vpp input range and bandwidth of 30MHz comes out to approximately 156uVrms or an effective bit number of less than 12. As I said before sometimes my input is as low as 200uVpp which means I'm using gains up to 10,000. With an input referred noise of about 1.8nV/sqrt(Hz) that I have simulated, a bandwidth of 30MHz, and a gain of 10,000 I calculate that I'm introducing just under 100mVrms of my own noise at the input of the ADC which will totally dwarf the noise of the ADC. So thats the situation, finally on to my questions.

I'm starting to think that there is absolutely no reason to gain the signal past the point where my analog path noise becomes the dominating factor, lets say when its 10x the input ADC noise. Sure I'm taking advantage of part of the ADCs range that I was missing before but I'm also increasing the noise and making the information in the less significant bits worthless right? If I were to lower the gain of the system described above to 100 so the noise I'm adding is just starting to drown out the ADC noise would I get just as reliable data from the ADC? i.e the same number of effective bits? If this is the case maybe I should be using a much lower resolution, cheaper ADC and getting the same results? I calculate that in the situation where I need a gain of 10,000 to reach full scale I'm only getting an effective number of bits equal to 2.5 and I'm paying for a 14 bit ADC which makes me feel like I screwed up:-(. Maybe I'm rambling, does anyone see anything I'm missing or have anything to add to clarify this? Thanks for reading!
 

Without thinking too hard about this, I think you've got a problem. If you lower your gain and, consequently your noise, you're also lowering your resolution, so I don't think you've gained anything. In other words, if you cut your noise by a factor of 2, you're also cutting your resolution by 2.

If I'm reading correctly, if you have 2V full-scale signal, you've also got 100mV of noise (regardless of what the ADC adds). That's a signal-to-noise ratio of 26dB, not so good.

Have you considering averaging? If you can integrate over a number of samples, you can lower your noise floor.
 
  • Like
Reactions: KD494

    KD494

    Points: 2
    Helpful Answer Positive Rating
Hi,

Your circuit looks good.
I recommend to run an FFT on the sampled data find out if there is one (or more) dominant noise frequency.
If yes, you could clean the source of this noise instead of manipulating your sensor signal.

Are you interested in signal frequencies down to DC or is there any limit.

To keep noise low..the first amplifier in chain should have the highest gain.

Is there a cable between sensor and ADC? (Or is the sensor mounted on the same PCB?)

Do you know the sensor's source impedance?

Klaus
 
  • Like
Reactions: KD494

    KD494

    Points: 2
    Helpful Answer Positive Rating
If I'm reading correctly, if you have 2V full-scale signal, you've also got 100mV of noise (regardless of what the ADC adds). That's a signal-to-noise ratio of 26dB, not so good.

Have you considering averaging? If you can integrate over a number of samples, you can lower your noise floor.

I made this confusing by interchanging units but in the same units the noise is actually 100mVrms out of a 707mVrms full scale input, even worse. However if you take the SNR as the ratio of the power of the signal to the power of the noise its about 34dB, still not good for an ADC thats capable of 73dB. I actually get good performance in the applications I'm looking at now but I'm curious if anyone knows if I could swap my ADC with a significantly cheaper IC with a noise floor more in the range of 34dB and still get exactly the same performance based on these results.

We currently do some averaging, the number of samples we integrate over depends on the data rate. So any improvements I can make to the noise in the hardware will allow us to average over fewer samples and scan faster. If I were to look at raw ADC data, do you know any way I could go about evaluating how much the averaging is helping? Say by assigning an effective SNR value?

- - - Updated - - -

Hi,

Your circuit looks good.
I recommend to run an FFT on the sampled data find out if there is one (or more) dominant noise frequency.
If yes, you could clean the source of this noise instead of manipulating your sensor signal.

Are you interested in signal frequencies down to DC or is there any limit.

To keep noise low..the first amplifier in chain should have the highest gain.

Is there a cable between sensor and ADC? (Or is the sensor mounted on the same PCB?)

Do you know the sensor's source impedance?

Klaus

From this response and the previous I'm definitely thinking I need to take a look at the raw ADC output data, I will definitely look into how I can run an FFT.

I should clarify the application to extent of what I'm allowed, these "sensors" are eddy current sensors so essentially a sense coil hanging off the front of the circuit I have posted above. They can be driven anywhere from just under 1Hz to 20MHz and often at multiple frequencies simultaneously (although not that full range at any given time).

We had some trouble finding a front end amplifier that would be suitable with all the functionality that we needed over this bandwidth. A gain of 4 on the front end of the instrumentation amp was just about as high as I was able to go with that IC before losing the BW I needed. For the two gain stages I do try to make the first amplifier carry most of the gain rather than split it evenly for this reason.

The sensors are fab'd on kapton and plug in through an edgemount connector on the board, sometimes they have traces up to 6 inches before reaching the front end amplifier but from that point to the ADC is only a few inches of PCB.

The sensors are just a coil so I suppose their input impedance is a few mOhms and maybe 1-100nH depending on the sensor? I usually model them as a current source terminated into the 1kOhm resistors seen in the circuit above.

Thanks for the response both of you!
 

For averaging, you first need to run your ADC at a higher sampling rate. For eg: if you double the sampling rate by 2x, on averaging you will get 3 dB advantage or 0.5 bit in ENOB.

As suggested in earlier posts, you can find out the dominant source of noise at the ADC input and clean that first.
 

Hi,

FFT:
There are many free tools around.
Even Excel can perfom an FFT.

*****
Eddy current sensor:
They are low impedance, isolated and I assume you are not interested in DC signal.

Then you could try a signal transformer to "amplify" your signal voltage.

But I´d try this:
(I´d avoid the true instrumentation amplifier and use a high gain first Opamp stage to decrease noise.)
You have a 1.65V ...maybe you need to stabilize it with an Opamp and a filter.
Then connect one sensor input directely to his 1.65V
Then build a gain of -50 (up to gain -100) inverting stage with one LTC6253. (noniverting input to 1.65V, close to where the sensor is connected)
Maybe use 50Ohms and 2500 Ohms feedback.

You could also try LT6200-5 or LT6200-10. Less noise, high bandwidth.

Klaus
This should reduce noise significantely, while it maintains bandwidth.
Then add other stages to get the desired gain.

One problem could be that the sensor introduces noise into the 1.65V.... then i´d modify the first stage as differential amplifier circuit.

- - - Updated - - -

Hi,

For averaging, you first need to run your ADC at a higher sampling rate. For eg: if you double the sampling rate by 2x, on averaging you will get 3 dB advantage or 0.5 bit in ENOB.

As suggested in earlier posts, you can find out the dominant source of noise at the ADC input and clean that first.

If you increase ADC sampling rate, then .. with this method ... you just decrease ADC noise, but you can´t reduce signal noise.
But here definitely signal noise is the problem.

Klaus
 

Eddy current sensor:
They are low impedance, isolated and I assume you are not interested in DC signal.

Then you could try a signal transformer to "amplify" your signal voltage.

That is correct, no DC needed. The though of signal transformers had crossed my mind but this open a whole new can of worms where I'm increasing the noise coupled in from the signal driving the sense coil. Not saying its impossible but I just haven't gotten to that yet. I was also worried about board space and possible cross coupling since there are actually several of these channels side by side.

But I´d try this:
(I´d avoid the true instrumentation amplifier and use a high gain first Opamp stage to decrease noise.)
You have a 1.65V ...maybe you need to stabilize it with an Opamp and a filter.
Then connect one sensor input directely to his 1.65V
Then build a gain of -50 (up to gain -100) inverting stage with one LTC6253. (noniverting input to 1.65V, close to where the sensor is connected)
Maybe use 50Ohms and 2500 Ohms feedback.

You could also try LT6200-5 or LT6200-10. Less noise, high bandwidth.

Thanks for the input, I'll definitely simulate this scenario and see how much of an improvement I see. In actual application the 1.65V is supplied by a local linear regulator fed by the 3.3V supply just to give a midpoint bias. The LDO provides minimum 40dB PSRR over my entire BW, do you really think it needs to be buffered or filtered given that its generated very locally to the electronics?

If you increase ADC sampling rate, then .. with this method ... you just decrease ADC noise, but you can´t reduce signal noise.
But here definitely signal noise is the problem.

So this is a better way of phrasing what I was looking for right from the start. If its a analog path problem than thats where I need to improve. Otherwise I might as well not use an ADC with such a high SNR right?
 

Hi,

maybe you need to stabilize it with an Opamp and a filter.
No, you don't need an Opamp, but I recommend to put at least 1 uF ceramics capacitor close to the sensor connection.
(Mind that ceramics capacitors have a piezoelectric effect. When there is mechanical stress, or heavy accoustical noise, then they will pick up some electrical noise)

*******
You say eddy current. Do you have the electrical source signal that cuses the eddy current? Or is it some mechanical source?
If you have the source, then you could correlate your signal to this source.

*******

Just to be sure: you have a proper GND plane? Solid and clean..

Klaus
 

You say eddy current. Do you have the electrical source signal that cuses the eddy current? Or is it some mechanical source?
If you have the source, then you could correlate your signal to this source.

Yes I am in control of the electrical source, the sensor has a drive coil which is driven from another PCB in the stack. The DAC that generates the drive signal is clocked by the same buffered clock as the ADC, not sure if that makes them correlated in any way. How would one go about forcing a correlation? I thought noise was either correlated or not and you have to deal with what you've got?

Just to be sure: you have a proper GND plane? Solid and clean..

Solid ground plane across the whole board are except directly beneath the front end op amp input pins to reduce the parasitic capacitance.
 

Hi,

I thought noise was either correlated or not and you have to deal with what you've got?
In my eyes true noise is always not correlated to any signal. It is random in amplitude and random in frequency.
(But I'm not sure if this is the general definition of noise)

If correlated to the signal, then I'd call it "distortion".

If correlated to another signal (maybe switching power supply) it is "introduced" and therefore usually has dominant frequencies.
And this is why I differ.
Dedicated frequencies can be shielded and filtered, but true noise is somehow more difficult to handle.

***
If your signal source is known, then i'd correlate your ADC results with the known signal to keep focus on the signal of interest and suppress all other frequencies as good as possible. But it can not be zeroed out completely.

A typical circuit that works in a similar way is a "lock in amplifier".

Klaus
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top