KD494
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This is a bit of a long question so thanks in advance for any insight! I'm working with an inductive sensor that will under some conditions that I need to measure be giving me as little 200uVpp response. The sensor can operate to upwards of 20MHz so the cutoff frequency for any filters in my analog path are set around 30MHz (this bandwidth is a must). My circuit consists of a low noise front end amplifier (LT6230) stage and two variable gain stages (LTC6253) before finally an ADC driver (THS4524), anti-aliasing filter, and ADC (LTC2174-14). A simplified version of the beginning of this circuit is shown in the image below.
I should say that this circuit works very well for what I'm using it for but I'm sure it could be better. Up until this point I have controlled the gain in such a way that whatever signal level I currently have at the input should be amplified as close to full scale as possible to leverage the full range of the ADC. However I recently decided to do some more in depth noise analysis and came across something I never noticed before. The ADC has an SNR of 73.1dB which with a 2Vpp input range and bandwidth of 30MHz comes out to approximately 156uVrms or an effective bit number of less than 12. As I said before sometimes my input is as low as 200uVpp which means I'm using gains up to 10,000. With an input referred noise of about 1.8nV/sqrt(Hz) that I have simulated, a bandwidth of 30MHz, and a gain of 10,000 I calculate that I'm introducing just under 100mVrms of my own noise at the input of the ADC which will totally dwarf the noise of the ADC. So thats the situation, finally on to my questions.
I'm starting to think that there is absolutely no reason to gain the signal past the point where my analog path noise becomes the dominating factor, lets say when its 10x the input ADC noise. Sure I'm taking advantage of part of the ADCs range that I was missing before but I'm also increasing the noise and making the information in the less significant bits worthless right? If I were to lower the gain of the system described above to 100 so the noise I'm adding is just starting to drown out the ADC noise would I get just as reliable data from the ADC? i.e the same number of effective bits? If this is the case maybe I should be using a much lower resolution, cheaper ADC and getting the same results? I calculate that in the situation where I need a gain of 10,000 to reach full scale I'm only getting an effective number of bits equal to 2.5 and I'm paying for a 14 bit ADC which makes me feel like I screwed up:-(. Maybe I'm rambling, does anyone see anything I'm missing or have anything to add to clarify this? Thanks for reading!
I should say that this circuit works very well for what I'm using it for but I'm sure it could be better. Up until this point I have controlled the gain in such a way that whatever signal level I currently have at the input should be amplified as close to full scale as possible to leverage the full range of the ADC. However I recently decided to do some more in depth noise analysis and came across something I never noticed before. The ADC has an SNR of 73.1dB which with a 2Vpp input range and bandwidth of 30MHz comes out to approximately 156uVrms or an effective bit number of less than 12. As I said before sometimes my input is as low as 200uVpp which means I'm using gains up to 10,000. With an input referred noise of about 1.8nV/sqrt(Hz) that I have simulated, a bandwidth of 30MHz, and a gain of 10,000 I calculate that I'm introducing just under 100mVrms of my own noise at the input of the ADC which will totally dwarf the noise of the ADC. So thats the situation, finally on to my questions.
I'm starting to think that there is absolutely no reason to gain the signal past the point where my analog path noise becomes the dominating factor, lets say when its 10x the input ADC noise. Sure I'm taking advantage of part of the ADCs range that I was missing before but I'm also increasing the noise and making the information in the less significant bits worthless right? If I were to lower the gain of the system described above to 100 so the noise I'm adding is just starting to drown out the ADC noise would I get just as reliable data from the ADC? i.e the same number of effective bits? If this is the case maybe I should be using a much lower resolution, cheaper ADC and getting the same results? I calculate that in the situation where I need a gain of 10,000 to reach full scale I'm only getting an effective number of bits equal to 2.5 and I'm paying for a 14 bit ADC which makes me feel like I screwed up:-(. Maybe I'm rambling, does anyone see anything I'm missing or have anything to add to clarify this? Thanks for reading!