Design of 12 bit SAR ADC problem

[vladimir1984]

sar split capacitor array

Hello there!
I have a task to design SAR ADC with 12 bit resolution. Now I use charge redistribution SAR ADC.
Is it possible to achieve 12 bit resolition with INL less 1 LSB and DNL less 0.5LSB with this archotecture? Or I need trimming, calibration, digital error corection and so on... I use 0.18um BiCMOS technology. Now, I have bad Monte Carlo process & mismatches results, DNL up to 4LSB.
And one problem more, without using an split capacitive array with attenuator capactor I'll have a huge die area, but using spliting I have worse results than without.
Can anybody help or give some tipps or advise!!!
Thanks
Best regards

 

[uladz55]

binary-weighted split-capacitive arrays

It's almost impossible to get 12-bit SAR ADC with good yield without callibration.
Split capacitor is necessary even for 8-bit SAR ADC.

Please check these topics.

 

[maxwellequ]

sar adc split-capacitor

vladimir1984,
12 bit is still feasible without calibration.
Is your capacitor array binary decoded, thermometer decoded or segmented (in this case what is the segmentation) ?

 

[jerryzhao]

adc 12 bit design

vladimir1984,
12 bit is still feasible without calibration.
Is your capacitor array binary decoded, thermometer decoded or segmented (in this case what is the segmentation) ?

I think when design 12bit SAR ADC . We can 6-6 segmented, the LSB use binary decoded, the MSB cap. array thermometer decoded.
A full differential comparator with offset cancel and full differential capacitor array was used.
But I think that is not enough, as the capacitor nonlinear distortion we not consider.
I think we should consider this distortion in 12Bit SAR ADC design even the MIM or PIP capacitor is very well.
But I can not find the detail information about capacitor nolinear in SAR ADC.
And only know the voltage dependence of capacitor may introduce distortion, but they are detail relation I don't know.
All those things trouble me long time, anyone can give me some advice.

 

[vladimir1984]

split capacitor and dnl

vladimir1984,
12 bit is still feasible without calibration.
Is your capacitor array binary decoded, thermometer decoded or segmented (in this case what is the segmentation) ?

Hello maxwellequ! I use charge redistribuition capacitive array. The capacitors in it are binary weighted. And the array is splitted on two parts - the MSB part, LSB part and atennuation capacitor in center. I don't have thermometer code. Is it possble to get thermometer code in this architecture? How?
Big thanks for the answer

Added after 4 minutes:

vladimir1984,
12 bit is still feasible without calibration.
Is your capacitor array binary decoded, thermometer decoded or segmented (in this case what is the segmentation) ?

I think when design 12bit SAR ADC . We can 6-6 segmented, the LSB use binary decoded, the MSB cap. array thermometer decoded.
A full differential comparator with offset cancel and full differential capacitor array was used.
But I think that is not enough, as the capacitor nonlinear distortion we not consider.
I think we should consider this distortion in 12Bit SAR ADC design even the MIM or PIP capacitor is very well.
But I can not find the detail information about capacitor nolinear in SAR ADC.
And only know the voltage dependence of capacitor may introduce distortion, but they are detail relation I don't know.
All those things trouble me long time, anyone can give me some advice.

Dear jerryzhao can you explain me how is possible MSB cap. array to be thermometer decoded? I can not imagine it.
Thank you

 

[jerryzhao]

adc distortion

I mean the top3 or top 4 MSB use thermometer code. that can save the DAC's seting time. use the 3 to 8 or 4 to 16 decode.