blindscience
Newbie level 4
I have a parameterized Verilog module foo that I would like to black box during DC synthesis and be able to plug in a simulation-only module later on. Essentially, whenever I've instantiated foo in my design, I would like DC to pass these instantiations (with parameters) through to the mapped Verilog.
I have read multiple techniques for black boxing logic in DC, including a) defining a port-only version of the module in Verilog and b) using
"set_app_var hdlin_sv_interface_only_modules {modulename}" to remove the internals of the module when the definition is pulled in. I have used both of these techniques with the same undesired result.
Specifically, I am running into two problems:
1) After compilation, the generated mapped.v file includes module definitions for instantiations of foo, such as below. This would indicate that DC is not correctly considering foo as a black box:
2) As a related issue, I can't just delete the empty module definitions and plug in my simulation model because, as show above, the parameters to the module have been removed and everything has been elaborated into a specific instance with a custom name.
What am I doing wrong?
Thanks!
I have read multiple techniques for black boxing logic in DC, including a) defining a port-only version of the module in Verilog and b) using
"set_app_var hdlin_sv_interface_only_modules {modulename}" to remove the internals of the module when the definition is pulled in. I have used both of these techniques with the same undesired result.
Specifically, I am running into two problems:
1) After compilation, the generated mapped.v file includes module definitions for instantiations of foo, such as below. This would indicate that DC is not correctly considering foo as a black box:
Code:
module fooInstanceParamValue1ParamValue2ParamValue3(
input porta;
input portb;
output portc;
)
endmodule
2) As a related issue, I can't just delete the empty module definitions and plug in my simulation model because, as show above, the parameters to the module have been removed and everything has been elaborated into a specific instance with a custom name.
What am I doing wrong?
Thanks!