Demstifing the code working of the feed back from ADC to change the PWM dutycycle (See the link)

[thannara123]

I am confusing the following code which working in feedback control of an inverter

                    FBV = ADC_Get_Sample(FBCh);
                    if (FBV < 512){
                       FB_Step++;
                       if (FB_Step > 12) FB_Step = 12;
                    }
                    else{
                         if (FB_Step > 0){
                            FB_Step--;
                         }
                    }
adder = FB_Step << 5;
                    TMR1L = 0;
                    TMR1H = 0;
                    T1IF_bit = 0;

see more about the code


The above code is updating the ADC values repeatedly in a while loop and change the dutycyle with the "adder" b

My doubt is that the adder value is varying from 0 to 384 .

Then how achive the voltage stabilization ?
can anybody clear my doubt ?

 

[FvM]

Look at sine_table, there's a percent comment. A better variable name instead of adder would be table_offset.

 

[thannara123]

Yes sir I seen it , but the table_offset value is not sustine any other value ,its only sustain "0" or "384"
it moves up 65% ,67.5%,70% ...... 95 % 97.5% 100% and vice versa .
not stay any other value
is it enough to stable the output voltage .

or may i need to give Offset_value according to each ADC volatge

ie is something like that

if(FBV<128)
{ set offset_value to 65% }
else if(FBV<256)
{ set offset_value to 75% }

which is better method

 

[FvM]

FB_Step can take integer values between 0 and 12, resulting in respective output voltage steps. Similar to voltage control with a tapped transformer. Expect that in steady state FB_step will jump up and down between two adjacent positions.

 

[thannara123]

Is that jumping is better for stabilization ?
I feel it's not good may i wrong

--- Updated Sep 13, 2023 ---

May that jumping lead to a fluctuations ?