Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

DCM Full Bridge is best because no shoot through current (cf CCM Full Bridge)

Status
Not open for further replies.
The other major advantage is that you don't have to deal with serious reverse recovery of o/p diodes in DCM / BCM.

p.s. using IGBT's will give you a much lower Coss to discharge at turn on.
 

DCM will require a ferrite output choke.
Deep CCM allows the use of iron powder which will be cheaper and likely smaller.
 

Thanks, in this case, the current is so low that even a ferrite inductor in dcm will be well small
 

This post is exactly related to the subject of this post.
It concerns a comparison between a DCM Full Bridge SMPS, and a CCM Full Bridge SMPS. (both 100W) .They are “identical” in almost every way that this is possible, they have the same transformer leakage in their secondaries.
The CCM one has three times MORE loss in its secondary side RC diode snubbers.
Also, the CCM one suffers severe ringing on its secondary diodes, -several hundred volts more overvoltage ringing than the DCM one.

Why is this?

(LTspice sims and pdf schems attached)
 

Attachments

  • Schematic _Full bridge CCM.pdf
    23.7 KB · Views: 42
  • Schematic _Full bridge DCM.pdf
    24.2 KB · Views: 48
  • FULL BRIDGE CCM.TXT
    14.5 KB · Views: 48
  • Full bridge DCM.TXT
    14.5 KB · Views: 63

Even when hard switching, shoot through should not be a problem. If it is then its a shortcoming of the drive circuitry, and maybe the FETs
...sorry but i disagree..
The following shows that in a hard-switched Full Bridge converter, the turn on of one fet in a leg, results in spurious turn-on of the opposite fet in that leg. (this results in shoot through current)
https://www.youtube.com/watch?v=lluqjxZRU-I

…this can indeed be solved by very heavily damping the turn on of the FETs, but then the switching losses get very high. The only thing you can do about this is have the turn off through a low value resistor, and the turn on through a high value resistor….but that as you know is a poor solution. The best way to overcome this problem is to use a Phase Shift Full Bridge converter.

I also remember the Lead design engineer at a global telco having this problem of spurious fet turn_on with a 300W full bridge SMPS, and he solved it on his next design by doing a phase shift full bridge converter instead.

- - - Updated - - -

............................................................................................
Here again is proof that this shoot through is real...
https://www.edaboard.com/threads/325827/
...FvM concurs that the only way to fight it is to use asymetric gate drive.
-But even that isnt that great..the way to deal is to go for the Phase shift full bridge.
You agree?
 

Surely proper gate drive is the issue here? you always need a low Z pull down on fets that are supposed to be off, so that dv/dt induced turn on cannot happen, this can be lessened by turning on fets more slowly, yes, but not necessary for a good gate drive ckt, we have thousands of hard switchers out there, reduced turn on - yes - but mainly for CM RFI propagation thru the Tx (i.e. to lessen EMC issues) turn off is usually very rapid (30nS) to remove turn off losses (most of them, actually very nearly all of it, due to non linear Coss). Gate drive is KING, sort that and many of your problems will go away - but not the control (& gate drive) glitch issues caused by too high dv/dt caused by too rapid a turn on in a hard switched ckt... that sort of hard RFI gets in every-where...
 
  • Like
Reactions: treez

    T

    Points: 2
    Helpful Answer Positive Rating
The thing is with a full bridge converter is that for the high side FET you are often using a pulse transformer drive, with a DC restoration circuit and a PNP turn-off stage. –Herein lies the trouble….the PNP turn-off stage cannot really hold the high side FET off with a low impedance…the gate voltage can peak up on a transient before the PNP snaps it back down again.
So really, the only choice here to avoid this shoot through problem is to use a Phase shift full bridge converter…you agree?
[Alternatives like bootstrap high side drives are unreliable when the input voltage is high (390V), and also, high side isolated gate drive supplies just involve too many components.]
 

i am sure you agree that you cannot be sure of designing a pulse transformer/DC restore/PNP turn off cct to stop this shoot through, the PNP as you know is a bjt and they are just too slow to be able to act and pull the fet gate back down quick enough after it shoots up due to a transient.
 

plenty of working ccts out there.... or use one Tx for one diagonal pair, and another for the other pair....

- - - Updated - - -

also no DC restoration needed....
 

Thanks, and do you agree that for a Full Bridge, the attached bipolar gate drive transformer set up is better than the DC-Restore/PNP turn off type?
(i admit this is an LLC but you will know what i mean, i am only referring to the high side gate drives)
As you know, if not using DC-restore, then no PNP turn off is needed either.
 

Attachments

  • LLC with bipolar fet drive transformer.pdf
    24.8 KB · Views: 46

none of your gate drive ccts look very attractive...

- - - Updated - - -

also there are plenty of high speed, high current pnp (& npn) xtors around these days for high performance gate drives, we also use low rdson fets for guaranteed hold off...
We have GD ccts that operate at 400kHz, 30nS transitions, 20V on and -5V off, and resonant transition also...plenty of industry info out there...
 

We have GD ccts that operate at 400kHz, 30nS transitions, 20V on and -5V off, and resonant transition also...plenty of industry info out there...
That sounds like you are using an isolated high side supply for the upper gate drive?
 

Here is the message that has just been posted:
***************
Thanks, but as you know, If you want to drive a high side FET for a full bridge, then its either.....
1....Bootstrap high side drive
2....Bipolar gate drive transformer
3....Gate drive transformer with DC restore and PNP turn off
4....Isolated high side supply referenced to upper fet source, with digital isolator pulsing up to high side gate driver

i've depicted 2 and 3, so you must be in favour of 1 or 4?

How about fully driven gate drive Tx followed by a high gain high speed active drive circuits, with adaptive gate drive depending on whether Vds is high or low?
 
  • Like
Reactions: treez

    T

    Points: 2
    Helpful Answer Positive Rating
well, we specialise in high reliability converters - so....

We have seen well coupled GD Tx's with 470 ohm or lower on each o/p doing good gate drive, +/-14V drive.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top