Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

damped sinusoid in cadence

Status
Not open for further replies.

akhilrathore

Member level 1
Joined
Jan 22, 2008
Messages
33
Helped
4
Reputation
8
Reaction score
2
Trophy points
1,288
Location
bangalore
Activity points
1,457
dear all,

Can anyone suggest me how to create a damped sinosoid source in cadence.
I was using a simple vsin source in which damping factor is one option putting a value less than one ideally it should work but its not working in my case.

kindly suggest me whatelse should i try.

regards,
akhil
 

You can generate a DS using an RLC circuit (see wikipedia) and driving it with a square wave. You should probably buffer the output with an ideal buffer too. The only problem you will have is that the DS will reverse polarity on each clock edge (positive will make the first oscillation go positive and a negative edge will make the first oscillation go negative).

Hope this helps.
 

akhilrathore said:
dear all,

Can anyone suggest me how to create a damped sinosoid source in cadence.
I was using a simple vsin source in which damping factor is one option putting a value less than one ideally it should work but its not working in my case.

kindly suggest me whatelse should i try.

regards,
akhil

What about multiplication of a continuous sinus with the wanted damping function (linear or exponential) ?
 

thanks,
but i want a sinusoid gradully decreasing... damped oscillation to be exact.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top