Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Current selector using JFET in resistor-divider

Status
Not open for further replies.

Wamor

Junior Member level 2
Joined
Jun 16, 2009
Messages
24
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,491
Hi All,

I have a voltage to current converter with a slope of 1.2195mA/V (so 0.82V will generate 1mA and 0.082V will generate 100uA).
I have created a circuit with which I can select between these 2 currents with a microcontroller.
For this I am using P-channel JFET because of its very low Id-leakage current when set to the "off"-state.
Please have a look at the attached schematic. Vi is the voltage going to the voltage to current converter and should change
between 0.82V and 0.082V.
When the FET is open (VGS is positive = 3.3v) there is still a leakage-current which is too high and which sets Vi to
0.7954V instead of 0.82V
The output-current is therefor arround 0.97mA and not at 1mA like expected.
When the FET is closed the current is arround 100uA like expected. Is there a way to reduce this leakage current so
that the 1mA will also be within +/-4% over a temperature-range of -40 to +100 degrees.
Could I solve this problem maybe by using another type of FET?

Thank you al for you reponses and best regards,

Wamor
 

Attachments

  • JFET current selector..PNG
    JFET current selector..PNG
    25.4 KB · Views: 118

I don't know if your P-channel JFET model is absolutely symmetric (so source and drain may be exchanged), but if not, the source should be at a more positive voltage than the drain.
 
  • Like
Reactions: Wamor

    Wamor

    Points: 2
    Helpful Answer Positive Rating
Hello Erikl,

Thank you for taking the time to respond.
The JFET which I am using in my design is the MMBFJ177 from Fairchild. There is also a type from OnSemi (MMBFJ177LT1G) which has drawn the gate in the middle between drain and source. Could this FET be the solution because I than change the source and drain to maken the source more positive than the drain?
Do you have suggestions for other kind P-channel JFET's which I can use for my application which have a very low leakage current.

Best regards,

Wamor
 

The JFET which I am using in my design is the MMBFJ177 from Fairchild. There is also a type from OnSemi (MMBFJ177LT1G) which has drawn the gate in the middle between drain and source. Could this FET be the solution because I than change the source and drain to make the source more positive than the drain?
They both have identical pin layout. Just try it!

Do you have suggestions for other kind P-channel JFET's which I can use for my application which have a very low leakage current.
2N5114..2N5116
 

J177 is basically symmetric, but 3.3V is only slightly above maximum cut-off voltage + Vds/2, some more margin is sugggested. 2N511x types have even higher maximum cut-off voltage, by the way.

I think, that a standard small NMOSFET will typically perform better.
 
  • Like
Reactions: Wamor

    Wamor

    Points: 2
    Helpful Answer Positive Rating
Hello FvM and Erikl,

Thank you for the responses.
Standard NMOSFET has even a higher leakage-current when being in the off-state and this current increases very fast at temperatures higher than 90 degrees.
When drain and source can be exchanged could my schematic work as I expect.
I did some testing today and saw the 1mA current stays stable between 0.958mA and 0,982mA when changing the temperature from 115 degrees to -50 degrees.
The 100uA current varies between 0,10099mA and 0.10194mA. Still do not understand 1mA current in not exactly 1mA. Anybody has some ideas?

Best regards,

Wamor
 

To distinguish between different temperature effects, you should repalce the FET switch by open and short in a first step. The reported deviations can be possibly explained by regular resistor T.C. and other non-ideal circuit behaviour.

For the PJFET, did you exclude possible incomplete cut-off by increasing the gate voltage?
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top