patato
Junior Member level 2
how do i define the spec of the comparator used in 1.8V 40MB 10Bit pipeline ADC stage(CMOS process)?
like 1.resolution 2.propagation delay
one thing that confuses me is,
how do i know my comparator is "fast enough"?
check Bode plot for BW ,or just run a transient simulation by input a step signal?
Added after 17 minutes:
forgot to say
it's a 1.5bit pipeline structure...
resolution = (input signal range)/1024 ≈ 1~2mv
so
the DC gain of the comparator
= (VOH-VOL)/resolution ≈1.8/1mv ≈ 60db
is this a reasonable estimation?
like 1.resolution 2.propagation delay
one thing that confuses me is,
how do i know my comparator is "fast enough"?
check Bode plot for BW ,or just run a transient simulation by input a step signal?
Added after 17 minutes:
forgot to say
it's a 1.5bit pipeline structure...
resolution = (input signal range)/1024 ≈ 1~2mv
so
the DC gain of the comparator
= (VOH-VOL)/resolution ≈1.8/1mv ≈ 60db
is this a reasonable estimation?