maioi
Newbie level 3
cmos10lpe process
Hello,
I'm using cmos10lpe (IBM kit), and i tried the layout of a single nfet, i put pins on each terminal, and subc on the substrate terminal, i have a clean lvs BUT with two ERC errors saying:
-Floating_sub: Substrate regions must connect to last metal in Cell or Chip
-Floating_sub2: Substrate regions must connect to GROUND net
I don't understand these errors, it seems it doesn't see the substrate tap in the layout ( i already put a tap)
can anyone help me please? how can i correct these ERC errors?
Thanks in advance.
Hello,
I'm using cmos10lpe (IBM kit), and i tried the layout of a single nfet, i put pins on each terminal, and subc on the substrate terminal, i have a clean lvs BUT with two ERC errors saying:
-Floating_sub: Substrate regions must connect to last metal in Cell or Chip
-Floating_sub2: Substrate regions must connect to GROUND net
I don't understand these errors, it seems it doesn't see the substrate tap in the layout ( i already put a tap)
can anyone help me please? how can i correct these ERC errors?
Thanks in advance.