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CMOS PA problem with exceeding 1.1 VDD

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I will design an cmos PA. The PA adopts fully diffential cascode architecture. The power control is realized by changing the output transistors size. So the VGD of M5 perhaps will exceed 1.1VDD. Is this a problem ? Or we can take some method 1. increase the L of nmos. 2. make the drain of cascode transistor longer?
 

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