CMOS based high speed comparator

[Sambhav_1]

Hi all,

I am working on design of high speed comparator and struggling a bit on internal hystresis, (like what are the different ways or topologies etc).
Is there any paper or theisis or any material which have detailed explanation for internal hystresis?

Thanks in Advance
Regards!

 

[dick_freebird]

I dislike internal hysteresis and will do almost anything
else to get hysteresis in the larger assembly.

I believe you're best off creating a perfect front end
and then figuring out to get hysteretic action at the
end. Superposition, like, after getting the fundamental
function sorted.

Cross-coupled loads on a continuous-time comparator
are one place to fiddle, going over 1:1 will put you hysteretic.
But this can be hard to control, the magnitude, while an
external switched-resistor network feature in the feedback
path (a PMIC always has one of those) is pretty corners-
consistent.

 

[Sambhav_1]

I dislike internal hysteresis and will do almost anything
else to get hysteresis in the larger assembly.

I believe you're best off creating a perfect front end
and then figuring out to get hysteretic action at the
end. Superposition, like, after getting the fundamental
function sorted.

Cross-coupled loads on a continuous-time comparator
are one place to fiddle, going over 1:1 will put you hysteretic.
But this can be hard to control, the magnitude, while an
external switched-resistor network feature in the feedback
path (a PMIC always has one of those) is pretty corners-
consistent.

ThankYou @dick_freebird ! I got your point however i have seen few of the comparator designs and most of them were having internal hysteresis. Is there any "big" benefit of internal hysteresis over the external?

 

[dick_freebird]

It's an trade like most things. You want "just enough" to tamp down chatter but not so much that Vio becomes intolerably sloppy or variable.

You can't have a 10mV comparator with 20mV hysteresis. If your input noise amplitude is 50mV P-P you will chatter regardless within 30-40mV of threshold. Then what seemed like a good idea has bought you nothing but complexity, yield / testability questions and a sloppier spec accuracy.

Still there are uses for a "Schmitt input, only I get to pick the threshold"... knowing your application's real values (if not a "general purpose", and you probably want flavors, there) is your only defense against "incoming spec insanity" becoming your burden to bear.

 

[Sambhav_1]

It's an trade like most things. You want "just enough" to tamp down chatter but not so much that Vio becomes intolerably sloppy or variable.

You can't have a 10mV comparator with 20mV hysteresis. If your input noise amplitude is 50mV P-P you will chatter regardless within 30-40mV of threshold. Then what seemed like a good idea has bought you nothing but complexity, yield / testability questions and a sloppier spec accuracy.

Still there are uses for a "Schmitt input, only I get to pick the threshold"... knowing your application's real values (if not a "general purpose", and you probably want flavors, there) is your only defense against "incoming spec insanity" becoming your burden to bear.

Got your point!
One more point, I think external hystresis comparator will take more power as compared to the internal one. So can i say that in low power-high speed applications internal hystresis will be preferred?

Actually, i am not able to clearly understand the point that why designers provide programmable internal hystresis in their designs and whynot go for less painful method?

Regards!

 

[dick_freebird]

One thing hysteresis does provide is a sort of "minimum
overdrive" (if you have it at the front end) due to the
regenerative local gain. Once it snaps, it snaps fast and
"just a bit:" but that can be enough to keep you out of
the low-overdrive-prop-delay tail. So when signal is
"adequate" you get more consistent timing across a range
of input amplitudes. And if it isn't, maybe it just shuts the
hell up instead of chattering on noise and fooling your burst
mode clock recovery preamble detector once every few
million packets and ... {bad things re project, personal
life and career ensue}.

"Programmamable" might have been a "why not?" when
some small group of fancy types were planning a cell library
and then a designer did what the fly sheet said, because
there were a dozen more after that. Just a hunch.