promach
Advanced Member level 4
How is https://www.academia.edu/9005130/DE...DISTRIBUTION_CIRCUIT_USING_SINGLE_PHASE_CLOCK different compared to clock divider tutorial at https://zipcpu.com/blog/2017/06/02/generating-timing.html ?
One is using TSPC prescaler approach in CMOS gates ?
The other is using counter approach in verilog ?
One is using TSPC prescaler approach in CMOS gates ?
The other is using counter approach in verilog ?
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