clk issue ! is following clock in pic is ok!

[dilan2005]

hi,
i am willing use lan81c185 with my fpga board and made my first the lan board.i just hook up the oscilloscope to tx_clk line(MII interface).it seems there were some overshoots and other distortions.

i like to know whether i need to hook up a Schmitt triggering ic to condition the clock signal before connecting to the fpga.(please check the attachment)

Thanks a lot!

rgds
dilan

 

[dilan2005]

sorry i will upload small size pics

 

[RBB]

Can't you send the FPGA pad to enable an internal Schmiddt trigger?

 

[Rob B]

Have you tried a different probe on the oscilloscope?

What type of probe are you using, not just a BNC to clips is it?

 

[dilan2005]

Can't you send the FPGA pad to enable an internal Schmiddt trigger?

thanks RBB. i am new to fpga can u please give more details about enabling Schmitt trigger.

Have you tried a different probe on the oscilloscope?

What type of probe are you using, not just a BNC to clips is it?

Rob B ,i am using 10x probe not just clips.is that a issue in the clock of 25MHz

Thanks a lot , to all of u guys!

rgds
dilan

 

[RBB]

I'm not sure which tools you are using, but when you define the IO in the FPGA you should be able to enable the Schmiddt triggers on your pad(s) of intereset.

 

[dilan2005]

RBB
PostPosted: 20 Apr 2008 17:28 Post subject: clk issue ! is following clock in pic is ok!
I'm not sure which tools you are using, but when you define the IO in the FPGA you should be able to enable the Schmiddt triggers on your pad(s) of intereset.

i am using xilinx ise8.1 for spatan3s200 fpga.how can i define input as schmitt triggerd one.

Added after 1 minutes:

RBB
PostPosted: 20 Apr 2008 17:28 Post subject: clk issue ! is following clock in pic is ok!
I'm not sure which tools you are using, but when you define the IO in the FPGA you should be able to enable the Schmiddt triggers on your pad(s) of intereset.

i am using xilinx ise8.1 for spatan3s200 fpga.how can i define input as schmitt triggerd one.
what sort of progration delay introduced due to this adding!

Thanks a lot!

 

[RBB]

I've never used that, so you may need to do some investigating. I would start looking at where you do your pad assignment.

 

[kalyansrinivas]

i dont know what is this schmitt trigger option but if the overshoot and under shoot is the problem than you can make slew rate to low in Xilinx ise pin assignment section

 

[derek122]

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[echo47]

The Spartan-3 doesn't have selectable Schmidt trigger inputs.

If your probe has a ground lead, the lead's inductance combined with the probe's input capacitance can cause ugly overshoot and ringing. Try removing the probe's ground lead, and then use a very short wire (about 1cm) to connect the probe's ground ring directly to a ground point on the PC board.