Can anyone help me with this concept? Urgent

[suhas_shiv]

hybrid cascode compensation

I am trying to analyse what this means and how this happens. I came across this in an Opamp design paper. Can anyone please explain this?

"The PMOS input differential pair allows the use of near
ground Vcmi, as the op-amp input common mode voltage. This allows the
use of relatively small NMOS transistors to design the switches that are
connected to Vcmi. This greatly increases the switch linearity in very
low-voltage circuitry without any complex area and power consuming
techniques such as bootstrapping and clock boosting."

Thanks

 

[Tiiu]

Do you have the full version of this paper?

 

[unkarc]

Hi,

Probably it was published in any or both of these two papers:

**broken link removed**
https://ieeexplore.ieee.org/iel5/8570/27138/01205746.pdf?arnumber=1205746

1) Low-voltage low-power fast-settling CMOS operational transconductance amplifiers for switched-capacitor applications

by: Yavari, M. Shoaei, O.
IC Design Lab, Univ. of Tehran, Iran

This paper appears in: Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03.
Publication Date: 25-27 Aug. 2003
On page(s): 345 - 348

Abstract
This paper presents a new fully differential operational transconductance amplifier (OTA) for low-voltage and fast-settling switched-capacitor circuits in digital CMOS technology. The proposed two-stage OTA is a hybrid class A/AB that combines a folded cascode as the first stage with active current mirrors as the second stage. It employs a hybrid cascode compensation scheme, merged Ahuja and improved Ahuja style compensations, for fast settling.

2) Low-voltage low-power fast-settling CMOS operational transconductance amplifiers for switched-capacitor applications

Yavari, M. Shoaei, O.
Electr. & Comput. Eng. Dept., Univ. of Tehran, Iran

This paper appears in: Circuits, Devices and Systems, IEE Proceedings [see also IEE Proceedings G- Circuits, Devices and Systems]
Publication Date: 15 Dec. 2004
Volume: 151 , Issue: 6
On page(s): 573 - 578

Abstract
The authors present a new fully differential operational transconductance amplifier (OTA) for low-voltage and fast-settling switched-capacitor circuits in pure digital CMOS technology. The proposed two-stage OTA is a hybrid class A/AB that combines a folded cascode as the first stage with active current mirrors as the second stage. Owing to the class AB operation in the second stage, slew limiting occurs only in the first stage, resulting in low power dissipation for switched -capacitor circuits. It employs a novel hybrid cascode compensation scheme, merged Ahuja and improved Ahuja style compensations, for fast settling. A design procedure for the minimum settling time of the proposed OTA is described. To demonstrate the efficiency of the proposed OTA and its compensation method three design examples are also provided.

Both papers are available at https://ieeexplore.ieee.org/Xplore/guesthome.jsp but I do not have access to download. If you wish to read the papers, ask them at this Forum.

It is possible that my findings of the above two papers are not exactly the one that suhas_shiv thinks of, in this case I apologize, being not able to do a more thorough / full search at ieeexplore site as a guest.

unkarc

 

[nassim_el85]

hi

The first sentence means that: for higher gain, we need more VGS so in PMOS source coupled pair it's better to have a lower input CM voltage. In some applications, such as some types of Successive Approximation ADCs, there is a switch at the signal pass before applying to the Op-amp. In low voltage applications, it's hard to turn on this switch because of the value of CM voltage, and need to use such approaches as bootstrapping and CLK boosting techniques. Also the switch nonlinearity in this case will degrade the system's performance.