Avnet Spartan-3 Evaluation Kit

[AB27]

avnet spartan 3

Does anyone have Avnet Spartan-3 Evaluation Kit ADS-XLX-SP3-EVL400 or ADS-XLX-SP3-EVL1500?

Do use use PCI interface? Which PCI core?
How do you configure I/O pins?

 

[Big Boy]

spartan-3 startup kit

I have that board, but I havn't had time to spend much time on it yet. I know, I must find some time to play with it!

For a PCI core, I suggest looking at opencores.org.

I have one question though, is if you have downloaded applications to the FPGA. Do you have problem with the JTAG chain? Me, I have to hold the FPGA in reset, by pressing the reset or program button, while the bitfile is being downloaded, or else, I get errors. Do you have the same problem?

I tried switching between 2.5V and 3.3V IO, but no help. Probably some noise along the JTAG chain on the board...

 

[AB27]

how to program spartan3 flash

When I use "Automatically connect to cable and identify Boundary-Scan chain" it works fine. I can program Spartan-3 and flash devices successfully.
"Verify" should be unchecked for Spartan-3.

Option "Enter a Boundary-Scan chain" doesn't work. I get an error:
ERROR:iMPACT:583 - '1': The idcode read from the device does not match the idcode in the bsdl File.
INFO:iMPACT:1578 - '1': Device IDCODE : 00001011011011011011011011011011
INFO:iMPACT:1579 - '1': Expected IDCODE: 00000001010000110100000010010011

 

[Big Boy]

spartan 3 enter boundary scan

A simple IDCODE loop create problem. It pass something like 10 to 50 loops and then cry that the IDCODE mismatch. This is when the FPGA is running.

If I hold the PROG mode, the RESET button (when it's connected to internal GSR), or when the flash doesn't contain valid bitfile (i.e. when the FPGA start-up but doesn't run due to missing bitfile), then there's no problem. I can IOCODE loop 10000 times without problem. Same with programming.

I should try to program without verify, a few times, and after each time, verify. If the verify fail when the FPGA is already running, but give success when I hold PROG button, then it's probably a problem past the flash chip, in the JTAG chain.

However, this make any in-service boundary scan (dubbuging) impractical, if I have to hold PROG or RESET.

I don't have a scope. If I had one, I could verify where the signals get weak along the chain, and correct the problem.

Thanks