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anyone can help me?question about pipelined adc

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zxasqw123

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hi everyone
i have two question :
1) if i want to design a 12bit or high reslution ADC ,how can i generate the reference,can RES have really good mismatch (<0.01%)?
2) if use Flip-around THA ,then SH will have no cap mismatch problem?and cap mismatch will not introduce the ditortion?
thanks
 

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