Analyzing the IC555 inner circuit

[Enrique15]

ic555

Hi again fellows.

Because the first project I built myself was using an IC 555, and I like to understand “mathematically” everything I use in a circuit, I started now to analyze mathematically its inner circuit.
So I started to check again my Donald Neaman’s electronics analysis text book. :lol:

The IC 555 inner circuit is as follows:
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(image taken from the web: **broken link removed**)
By the way, this website has a great general explanation of the IC555 and some circuits.

I’ve re-drawn the circuit for a little bit more understanding:
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At the beginning I start the analysis with just two connections: Vcc and Ground (the other pins of the IC 555 aren’t connected to anything for now).

First I analyze the most left-hand part of the circuit:
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It seems that there are two current mirrors, but the left one doesn’t have a path for the “reference” current to flow, because the Darlington transistors aren’t active (they are cut) since there’s no voltage at the Threshold pin.
Therefore, eliminating the transistors that don’t have current flowing, the circuit is:
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Now, theoretical current mirrors have a “normal” path for the reference current (normally a resistor), so we can obtain easily the reference current. But in this case the path for the reference current is the Darlington transistors. And that Darlington depends on the voltage at its entrance. It seems that the analysis for this current mirror is a bit different than the analysis I get in the textbook.

So, let’s analyze the Darlington biasing:
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Calculating the Thevenin voltage and resistor:
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This yield:
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And solving we have:
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We know that:
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and also:
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Besides:
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and also: **broken link removed**

And because we have:
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then:**broken link removed**

Assuming that:
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yields: **broken link removed**

Solving the circuit:
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Now we can move on to the current mirror:
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where you see:
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This results in:
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and finally:
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Sadly this is where I get stuck ; because I don’t figure out how to calculate currents through Q3 and Q4.

I could think of trying to make an analysis as in the Widlar current source, because of the resistors connected to the emitters of Q3 and Q4. But unfortunately at the end I’ll still have two variables: Ic3 and Ic4.

Maybe someone would say: “do not consider Ib3 and Ib4 and just make Ic4 = Ic1 + Ic2.”

But I think that in this case I just can’t try not considering both base currents. Because they will be totally different due to the two values of resistor connected to each emitter.

I thought of calculating the “reference” current (the one through Q4) by calculating the voltage drops through "R=4.7k" --> "Vbe4" --> "Vce2" --> "R=10k". But there’s the problem of not knowing Vce2 (and I don’t want to assume Vce2 = 0, because that won’t be accurate).

Can somebody suggest me a way of analyzing this one?
So I can move on analyzing the rest of the circuit.

Thanks in advance.

See you later.

 

[aryajur]

some circuits based on ic555

Since the threshold and trigger pins are connected to 2 comparators you can be sure that the transistors in the capacitors have at least a Current Gain(β) of 100 or greater. So the base currents will be neglegible compared to the Collector currents and thus the Emitter currents.
Taking the Vbe of each transistor in Linear region to be 0.7 Volt. The for the threshold comparator, voltage at the base of Q1 is 2/3Vcc. Subtract 2 Vbe's from it you get the voltage across the 10K resistor. Therefore this current:

I12 = (2/3Vcc-1.4)/10K

will flow through Q1 and Q2 and thus thru Q4 and the 4.7K resistor. So the voltage at the base of Q4 will be

Vcc - I12 4.7K - 0.7 = Vb4

Equate this to Vb3 and you can get the current through the 830 ohm resistor. A similar analysis can be done for the Trigger comparator. The Latch that follows is simply analysed by seeing which transistors will be in cut off and which in saturation or linear. The last is the output stage which may be analysed separately.

 

[Enrique15]

ic inner circuit hand book

Thanks a lot aryajur for answering.

But I have a doubt:

you can be sure that the transistors have at least a Current Gain(β) of 100 or greater. So the base currents will be neglegible compared to the Collector currents and thus the Emitter currents.

OK, this concept of "neglegible" base currents is always used in electronics theory to analyze easier the transistors but:

Therefore this current:

I12 = (2/3Vcc-1.4)/10K

will flow through Q1 and Q2 and thus thru Q4 and the 4.7K resistor.

Even though base current in Q1 is insignificant, there will be a significant Collector Current that will flow through Q2's base and make a higher current through Q2's collector.

Why then should I assume that Ic1 and Ic2 are the same ? They should be different. And thus, it seems to me that Collector current in Q4 should be greater than I12 = (2/3Vcc-1.4)/10K.

Or is this another easy way to analyze the circuit ?

Because I'm trying to make a little more accurate analysis. As the analysis that books teach about biasing A type-amplifier transistors, where they use all the currents (I base, I collector, I emitter), even though I base is small, and even though Beta>100.

If this is not too much asking (and bothering) I'll appreciate a suggestion for a more accurate calculations.

But if you know that not even the greatest electronic book uses such accurate analysis, let me know that too, and I'll withdraw from trying to be so accurate with the analysis, and move on to the rest of the circuit.

Thanks again aryajur for helping with my question.

I'll wait for other suggestions.
See you later.

 

[Big Boy]

intitle:ic555

I'm really not a math guru, but I remember some electronic course where we studied differential amplifier. At that time, when I was a lot less rusty with the math, we used Ebers-Moll models, which were very usefull. One sentense I rememberd from the teacher was that differential amplifier can be modeled much more easily with Ebers-Moll equations. Do a search for Ebers-Moll on google...

 

[aryajur]

analyse of 555 circuit ebook

Thats true that the emitter current of Q1 may not be negligible, which forms the base current of Q2, but here we are not neglecting that current.
I12 = I1 + I2
so the emitter current actually is accounted in the calculations. The concept of taking approximations is in fact quite important in circuit analysis, because, accurate is not something humans can do for circuits anymore. To take an example, the BSIM version 3 model of a MOS has more than 200 parameters to get accuracy to real transistors. Imagine doing calculations with that many parameters and still miss out with real accuracy for some particular sizing or operation region!
So circuit analysis should be done which would help you gain insight and intuition about the circuit. A factor of hundred is safe to ignore because 2 decimal places of values are more than enough to get an idea of the circuit, and then carrying decimels further often doesnot have any meaning, because the model you are using for hand calculations is itself inaccurate anyway.
Again if you do want to do accurate analysis, then the assumption that Vbe = 0.7 is not quite correct. For more accuracy, you should use the exponential equation for the emitter current, as it depends on the base emitter voltage.

Ie = Io exp(Vbe/nVt) or more accurately
Ie = Io(exp(Vbe/nVt)-1)

Well anyway, finally, if you want to keep solving the way you were doing, to satisfy yourself, all you need is 1 more equation in Ib3 and Ib4, which can be written from:

Ie3*830 = Ie4*4.7K (Using KVL in the loop containing the BE junctions of Q3 Q4)
Ie3 = (β+1)Ib3
Ie4 = (β+1)Ib4

An interesting exercise will be to solve using this and to solve neglecting the base currents, keeping the current gain β to be more than 100 and see the percentage error you get. Then maybe go ahead and solve using the exponential equations. This is the best way to get comfortable with approximations.
Hope this helped you.