How can I test the fault coverage of LFSR circuit on the ISCAS‘89 benchmark？

[sicetn]

Now I need to use LFSR to generate pseudo-random test vectors and input them into the benchmark scan chain of the full scan structure to obtain fault coverage. I have tried manually writing the generated test vectors into the STIL file, but in the Force PI step of full scan simulation, primary input data needs to be written. How can this data be provided (because the pseudo-random test vectors are only input into the scan chain)?
I have the Tetramax ATPG tool, how should I achieve my goals next?Thanks.