AMBA AHB address question

[lemonsky]

HI, All:
I'm confused when reading AMBA AHB specification. The address is HADDR[31:0] and thought it should be corresponding to double word or 32bit (HWDATA[31:0] or HRDATA[31:0]), since the data port is 32bit width. That's means address 0x0 stands reg_addr_0[31:0], address 0x1 stands reg_addr_1[31:0].
But at burst transfer example in spec, the address after 0x20 is 0x24, which let me thought HADDR[31:0] is byte address. That means for one HWDATA[31:0] or HRDATA[31:0], there are 4 address mapping to it depending on little or bit endian as following:
DATA ----- ADDRESS
HWDATA[31:24] -> HADDR[31:0]
HWDATA[23:16] -> HADDR[31:0] + 1
HWDATA[15: 8] -> HADDR[31:0] + 2
HWDATA[ 7: 0] -> HADDR[31:0] +3
So which one is correct for design spec? And where I could find the clear define for it?

Thanks!

 

[imbichie]

In AHB, a single address like , 0X00, 0x01, 0x02, etc is used for addressing a Byte.
If the Data Width is 32, which means there are 4 Bytes, so if the address of the current burst is 0x30, then the address of the next burst will be 0x34.