Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

ADS substrate definition (metal Pass through different oxide layers)

Status
Not open for further replies.

happsky

Advanced Member level 4
Joined
Jun 6, 2011
Messages
101
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,296
Activity points
1,932
I have a metal between 3 oixde layers, show as bellow:

m91.jpg


I face 3 problems as :
1. the metal is thicker than oxide layer ,this will calls error;
2.And then,I split the metal to 3 metal layers ,and make them overlay as a metal layer . The thickness of center layer is eqeul to oxide2, this also forbidden.
3. Follow step 2 's idea, I change the center metal to be a vias ,and it no error now. But I don't know if a vias is equal to a metal when meshing and simulation( I have set the vias to be 3D-mesh the same as the metal layer before simulation).
note:the version of ads is 2011
using step 3 's idea the substrate is shown as:
m9.jpg
And do I need to set the precedence of the metal layer when they overlay?

Any ideas? thank you very much!
 
Last edited:



Maybe this helps: Add three metals with your substrates, metal thickness is just a little bit smaller than substrate thickness (in pic: subst: 25mil, metal: 24.99mil), add a very thin substrate layer and use vias for connection.

The question is the excitation, you should investigate if each metal needs a port or just e.g. the middle metal.
 

I simulate the model as I just said in step 3, the resistance is larger than simulate in sonnet. I think the via is no the same as the metal.......(but maybe sonnet is error)

- - - Updated - - -

Thank you ,I will try it ..
 

I simulate the model as I just said in step 3, the resistance is larger than simulate in sonnet. I think the via is no the same as the metal.......(but maybe sonnet is error)

Agree, the simulation of the via is not the same simulation with metal. It's different. Maybe try my idea!
 

it is my mistake that the metal layer thickness is error(to thin).
 

any one face the problem like this?

- - - Updated - - -

I found that using the via to connect two metal cost lots of time ...
 

Help ~~~~~~~~~
 

Did you tried my variant? The simulation time will increase because of many vias but maybe the results are helpful!
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top