about LATCH getting generated

[HPC]

In my code, during synthesis, I am getting a warning as a latch getting generated from always block.
Here actually, I am demultiplexing the incomming data on d2_sync.
Can anyone help me out how do I take care of this?

Piece of code:
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reg [10:0] internal_storage;
reg [3:0] data_count;
reg d2_sync;

always @(internal_storage,d2_sync,data_count)
begin
case (data_count)
4'b0000 : internal_storage[0] = d2_sync;
4'b0001 : internal_storage[1] = d2_sync;
4'b0010 : internal_storage[2] = d2_sync;
4'b0011 : internal_storage[3] = d2_sync;
4'b0100 : internal_storage[4] = d2_sync;
4'b0101 : internal_storage[5] = d2_sync;
4'b0110 : internal_storage[6] = d2_sync;
4'b0111 : internal_storage[7] = d2_sync;
4'b1000 : internal_storage[8] = d2_sync;
4'b1001 : internal_storage[9] = d2_sync;
4'b1010 : internal_storage[10]= d2_sync;
default : internal_storage = 11'b00000000000;
endcase
end
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Warning :Latch generated from always block for signal internal_storage[9], probably caused by a missing assignment in an if or case stmt
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Latch generated from always block for signal internal_storage[0], probably caused by a missing assignment in an if or case stmt

 

[jbeniston]

Yes, you will get a latch, because you are not assigning a value to all bits of internal_storage through each path through the always block.

If data_count is 4'b0001? what should the value of internal_storage[0] be? You aren't speciying that.

Should it be:

4'b0001 : internal_storage = {9'b0, d2_sync, 1'b0};

Or:

4'b0001 : internal_storage = {internal_storage[10:2], d2_sync, internal_storage[0]};

You code is currently equivalent to the second form.