sp3
Member level 5
Hello guys,
I am relatively new to the VLSI/ASIC field. Usually people speak about different flows like Synopsys,Cadence,Magma flow.. What does this corresponds to ?? My understanding is that using one EDA vendors all tools to realise a chip(from RTL to GDS)..Am I right ?? Requesting you guys to put more light on this topic..
Thanks,
I am relatively new to the VLSI/ASIC field. Usually people speak about different flows like Synopsys,Cadence,Magma flow.. What does this corresponds to ?? My understanding is that using one EDA vendors all tools to realise a chip(from RTL to GDS)..Am I right ?? Requesting you guys to put more light on this topic..
Thanks,