amphy
Newbie level 3
Hi,
Would you please tell me how I design and make the boundary pad around the
chip using Cadence SOC Encounter and simulate and verify the design to be a
practical chip picture in my computer,thank you!
Would you please tell me how I design and make the boundary pad around the
chip using Cadence SOC Encounter and simulate and verify the design to be a
practical chip picture in my computer,thank you!