icsoul
Member level 3
veriloga loop filter
When constructing a pll with veriloga, I got the vco control voltage like in the attachment. It seems to be oscillating periodically.
Which block has problem according the vctrl waveform?
When constructing a pll with veriloga, I got the vco control voltage like in the attachment. It seems to be oscillating periodically.
Which block has problem according the vctrl waveform?