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A new resonant DC-DC converter: Pe17 circuit

Atal

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I hereby present my newly invented resonant DC-DC converter circuit, named 'Pe17 circuit'.

view1.PNG


view2.PNG


Features:
* Resonant half/full bridge inverter, utilizing ZVS operation.
* Constant frequency switching.
* Wide input/output voltage range operation capability, suitable also for EV battery chargers.
* Higher efficiency and power density.

Brief intro:

For more details, see US patent - US11139734:

Attached:
Presentation providing comparison between the Pe17 circuit and the LLC resonant circuit.
LTSpice simulation files for evaluation.
 

Attachments

  • Comparison of the Pe17 circuit and the LLC resonant circuit for power supply DC-DC conversion.pdf
    3.7 MB · Views: 269
  • simulation.zip
    70.2 KB · Views: 184
Still room for the improvement with 6% ripple Vpp
This ripple can be halved by replacing the 2x 1500 µF output capacitors with 4x 2200 µF ones (cost more money and space).
In detailed simulation, set C6=150n, C11=8.2n, R40=6k, R44=11k, R55=1k, Tdelay of V1 to 2.6 ms, and remove D15 and R42.

vout.PNG


It goes without saying that 3000 µF is an absurdly low amount of reservoir for a 12 V output at this power level, and 6% load transition ripple still complies with ATX PSU specifications.
 
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Regarding the Onsemi appnote for Gan-based 300W LLC DC-DC converter, 1650µF were used for 19 V output while the full-load to no-load transition ripple was 1.2 V (~6%) even with the additional current feedback. Scaling it for a 500 W 12 V output, ~6800µF are required. Of course that a typical 500 W PSU employs at least 10 elcaps at the output, amounting to much more than 6800µF.

2.png
 
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Take for example the HDPLEX 250W GaN and the PlayStation 5 ADP-400DR, which are not standard ATX power supplies, yet these amass respective 9000µF and 13000µF.

HDPLEX 250W GaN.jpg


ADP-400DR.jpg
 
How do you convince OEM buyers which supply is better on metrics?

Cost vs Performance vs size vs reliability for high volume benign consumer environments.

cents per Watt? vs % overshoot vs % ripple vs tolerances vs??

From my past experience in the 80's & 90's, Engineering would try to qualify 2 of the suppliers for performance and test all of the 30 pages of specs to and beyond limits then allow changes to comply with all environmental limits and perform 20 unit elevated temp. power cycling MTBF tests. Then if they passed DVT tests to get qualified, purchasing would negotiate for best price and delivery. These were the likes of Hammond, Brown, Lambda, Shindengen, PowerOne and Fujitsu.
 
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How do you convince OEM buyers which supply is better on metrics?

Cost vs Performance vs size vs reliability for high volume benign consumer environments.

cents per Watt? vs % overshoot vs % ripple vs tolerances vs??

From my past experience in the 80's & 90's, Engineering would try to qualify 2 of the suppliers for performance and test all of the 30 pages of specs to and beyond limits then allow changes to comply with all environmental limits and perform 20 unit elevated temp. power cycling MTBF tests. Then if they passed DVT tests to get qualified, purchasing would negotiate for best price and delivery. These were the likes of Hammond, Brown, Lambda, Shindengen, PowerOne and Fujitsu.
It's difficult for me to answer, since I've no marketing skills or affinity.
I believe your engineering experience back then was different and more qualitative than what is nowadays.
 
But you must choose a design based on cost vs performance, right?
So how do you compare?

e.g. Cost of passives vs active parts relative to efficiency and %error+noise over range of load?
or cost of Rdson vs performance for SiC FET , IGBT vs Si and
ESR of C's vs ESR*C for gang effects vs Tr or f
 
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But you must choose a design based on cost vs performance, right?
So how do you compare?

e.g. Cost of passives vs active parts relative to efficiency and %error+noise over range of load?
or cost of Rdson vs performance for SiC FET , IGBT vs Si and
ESR of C's vs ESR*C for gang effects vs Tr or f
See the Pareto surface in the graph below - there's an optimal spot to which the design is supposed to converge.

pareto surface.PNG


It was taken from a presentation of ETH Zurich university:
 

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