hodagh
Newbie level 4
Hi everyone
I wrote a behavioral verilog code for an unsigned 8*8 multiplier but when I simulate it, it doesn't show the right answer
I would be happy if anybody can help !
module mult8(p,x,y);
output [15:0]p;
input [7:0]x,y;
reg [15:0]p=0;
reg [7:0]a;
integer i;
always @(x , y)
begin
a=x;
for(i=0;i<8;i=i+1)
begin
if(y)
begin
p<=p+a;
a=a<<1;
end
else
a=a<<1;
end
end
endmodule
I wrote a behavioral verilog code for an unsigned 8*8 multiplier but when I simulate it, it doesn't show the right answer
I would be happy if anybody can help !
module mult8(p,x,y);
output [15:0]p;
input [7:0]x,y;
reg [15:0]p=0;
reg [7:0]a;
integer i;
always @(x , y)
begin
a=x;
for(i=0;i<8;i=i+1)
begin
if(y)
begin
p<=p+a;
a=a<<1;
end
else
a=a<<1;
end
end
endmodule