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Your L of 120nm is going to kill Rout, more L and/or cascodes (maybe folded, since low headroom vs VT. Keep adding L until it costs you more in gm than it delivers in Rout (the parallel of all attached impedances, 2 FETs and any external load).
Peculiar that this was not among the "anything I try" since it's basic art for amplifiers (not just OTAs).
Testbench is wrong. You cannot simulate open loop Amplifier and expect good results.
On this forum is plenty of threads how to simulate opamp. The same about proper design procedures.
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