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[SOLVED] 2 iif-endifs inside a process

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diju.ms

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what will happen if i am using two if-end if blocks inside a process in vhdl??it will be executed sequntially or parallelly??



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Code VHDL - [expand]
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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
 
 
entity RAMO is
PORT(ADDRESS:IN STD_LOGIC_VECTOR(3 DOWNTO 0);
        WR:IN STD_LOGIC:='1';
        CLK:IN STD_LOGIC;
        DATAIN:IN STD_LOGIC_VECTOR(7 DOWNTO 0):="10101010";
        DATAOUT:OUT STD_LOGIC_VECTOR(7 DOWNTO 0));
END ENTITY;
architecture Behavioral of RAMO is
TYPE TEMPRAM IS ARRAY (0 TO 15) OF STD_LOGIC_VECTOR(7 DOWNTO 0);
SIGNAL TEMP:TEMPRAM;
SIGNAL I:INTEGER:=0;
BEGIN
PROCESS(CLK,ADDRESS)
BEGIN
 
IF(CLK'EVENT AND CLK='1')THEN
 
IF(ADDRESS="0001")THEN
    I<=1;
 
ELSIF(ADDRESS="0010")THEN
    I<=2;
 
ELSIF(ADDRESS="0011")THEN
    I<=3;
 
ELSIF(ADDRESS="0100")THEN
    I<=4;
 
ELSIF(ADDRESS="0101")THEN
    I<=5;
 
ELSIF(ADDRESS="0110")THEN
    I<=6;
 
ELSIF(ADDRESS="0111")THEN
    I<=7;
 
ELSIF(ADDRESS="1000")THEN
    I<=8;
 
ELSIF(ADDRESS="1001")THEN
    I<=9;
 
ELSIF(ADDRESS="1010")THEN
    I<=10;
 
ELSIF(ADDRESS="1011")THEN
    I<=11;
 
ELSIF(ADDRESS="1100")THEN
    I<=12;
 
ELSIF(ADDRESS="1101")THEN
    I<=13;
 
ELSIF(ADDRESS="1110")THEN
    I<=14;
 
ELSIF(ADDRESS="1111")THEN
    I<=15;
 
ELSE
    I<=0;
 
END IF;
IF(WR='1')THEN
TEMP(I)<=DATAIN;
ELSE
DATAOUT<=TEMP(I);
END IF;
END IF;
END PROCESS;
END BEHAVIORAL;




its a program of 16 byte ram..but when i am giving clock output lags by one clock...so its almost like two separate blocks working parallel
 
Last edited by a moderator:

please post the full code
 

hai have edited my post..please help me
 

Your if statements are mutually exclusive so I think they'll be synthesized to parallel logic.
But you know you want parallel execution - I suggest using the "case" statement.
 

thank you for your help...
i got another problem when using case....the program works perfectly in -ve edge (IF(CLK'EVENT AND CLK='0')THEN) ..if i am changing that into +ve edge (IF(CLK'EVENT AND CLK='1')THEN) then the program behaves like fatal error.an error message is also produced...i am attaching the code below....can you please look at it and correct me...




----------------------------------------------------------------------------------
Code VHDL - [expand]
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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
 
 
entity RAMO is
PORT(ADDRESS:IN STD_LOGIC_VECTOR(6 DOWNTO 0);
        WR:IN STD_LOGIC:='1';
        CLK:IN STD_LOGIC;
        DATAIN:IN STD_LOGIC_VECTOR(7 DOWNTO 0):="10101010";
        DATAOUT:OUT STD_LOGIC_VECTOR(7 DOWNTO 0));
END ENTITY;
architecture Behavioral of RAMO is
TYPE TEMPRAM IS ARRAY (0 TO 127) OF STD_LOGIC_VECTOR(7 DOWNTO 0);
SIGNAL TEMP:TEMPRAM;
SIGNAL I:INTEGER;
BEGIN
PROCESS(CLK,ADDRESS)
BEGIN
case address is
    when "0000001"=>I<=1;
    when "0000010"=>I<=2;
    when "0000011"=>I<=3;
    when "0000100"=>I<=4;
    when "0000101"=>I<=5;
    when "0000110"=>I<=6;
    when "0000111"=>I<=7;
    when "0001000"=>I<=8;
    when "0001001"=>I<=9;
    when "0001010"=>I<=10;
    when "0001011"=>I<=11;
    when "0001100"=>I<=12;
    when "0001101"=>I<=13;
    when "0001110"=>I<=14;
    when "0001111"=>I<=15;
    when "0010000"=>I<=16;
    when "0010001"=>I<=17;
    when "0010010"=>I<=18;
    when "0010011"=>I<=19;
    when "0010100"=>I<=20;
    when "0010101"=>I<=21;
    when "0010110"=>I<=22;
    when "0010111"=>I<=23;
    when "0011000"=>I<=24;
    when "0011001"=>I<=25;
    when "0011010"=>I<=26;
    when "0011011"=>I<=27;
    when "0011100"=>I<=28;
    when "0011101"=>I<=29;
    when "0011110"=>I<=30;
    when "0011111"=>I<=31;
    when "0100000"=>I<=32;
    when "0100001"=>I<=33;
    when "0100010"=>I<=34;
    when "0100011"=>I<=35;
    when "0100100"=>I<=36;
    when "0100101"=>I<=37;
    when "0100110"=>I<=38;
    when "0100111"=>I<=39;
    when "0101000"=>I<=40;
    when "0101001"=>I<=41;
    when "0101010"=>I<=42;
    when "0101011"=>I<=43;
    when "0101100"=>I<=44;
    when "0101101"=>I<=45;
    when "0101110"=>I<=46;
    when "0101111"=>I<=47;
    when "0110000"=>I<=48;
    when "0110001"=>I<=49;
    when "0110010"=>I<=50;
    when "0110011"=>I<=51;
    when "0110100"=>I<=52;
    when "0110101"=>I<=53;
    when "0110110"=>I<=54;
    when "0110111"=>I<=55;
    when "0111000"=>I<=56;
    when "0111001"=>I<=57;
    when "0111010"=>I<=58;
    when "0111011"=>I<=59;
    when "0111100"=>I<=60;
    when "0111101"=>I<=61;
    when "0111110"=>I<=62;
    when "0111111"=>I<=63;
    when "1000000"=>I<=64;
    when "1000001"=>I<=65;
    when "1000010"=>I<=66;
    when "1000011"=>I<=67;
    when "1000100"=>I<=68;
    when "1000101"=>I<=69;
    when "1000110"=>I<=70;
    when "1000111"=>I<=71;
    when "1001000"=>I<=72;
    when "1001001"=>I<=73;
    when "1001010"=>I<=74;
    when "1001011"=>I<=75;
    when "1001100"=>I<=76;
    when "1001101"=>I<=77;
    when "1001110"=>I<=78;
    when "1001111"=>I<=79;
    when "1010000"=>I<=80;
    when "1010001"=>I<=81;
    when "1010010"=>I<=82;
    when "1010011"=>I<=83;
    when "1010100"=>I<=84;
    when "1010101"=>I<=85;
    when "1010110"=>I<=86;
    when "1010111"=>I<=87;
    when "1011000"=>I<=88;
    when "1011001"=>I<=89;
    when "1011010"=>I<=90;
    when "1011011"=>I<=91;
    when "1011100"=>I<=92;
    when "1011101"=>I<=93;
    when "1011110"=>I<=94;
    when "1011111"=>I<=95;
    when "1100000"=>I<=96;
    when "1100001"=>I<=97;
    when "1100010"=>I<=98;
    when "1100011"=>I<=99;
    when "1100100"=>I<=100;
    when "1100101"=>I<=101;
    when "1100110"=>I<=102;
    when "1100111"=>I<=103;
    when "1101000"=>I<=104;
    when "1101001"=>I<=105;
    when "1101010"=>I<=106;
    when "1101011"=>I<=107;
    when "1101100"=>I<=108;
    when "1101101"=>I<=109;
    when "1101110"=>I<=110;
    when "1101111"=>I<=111;
    when "1110000"=>I<=112;
    when "1110001"=>I<=113;
    when "1110010"=>I<=114;
    when "1110011"=>I<=115;
    when "1110100"=>I<=116;
    when "1110101"=>I<=117;
    when "1110110"=>I<=118;
    when "1110111"=>I<=119;
    when "1111000"=>I<=120;
    when "1111001"=>I<=121;
    when "1111010"=>I<=122;
    when "1111011"=>I<=123;
    when "1111100"=>I<=124;
    when "1111101"=>I<=125;
    when "1111110"=>I<=126;
    when "1111111"=>I<=127;
    when others=>I<=0;
end case;
 
 
IF(CLK'EVENT AND CLK='0')THEN
 
IF(WR='1')THEN
TEMP(I)<=DATAIN;
ELSE
DATAOUT<=TEMP(I);
END IF;
END IF;
END PROCESS;
END BEHAVIORAL;
 
Last edited by a moderator:

Please use
Code: 
 tags for your vhdl code.  Also, what was the error message you got for the positive clock edge case?
 

sorry about that...i am attaching a code with comments below...if i am executing it creates a logical error...it automatically writes data into my 0th location..even if i am giving "0000011" as the address then it writes data in both "0000000" and "0000011" locations....i am not able to find the error.please help me



Code VHDL - [expand]
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----128 BYTE RAM------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
 
 
entity RAMO is
PORT(ADDRESS:IN STD_LOGIC_VECTOR(6 DOWNTO 0);
        WR:IN STD_LOGIC:='1';----if=1 then writes data into ram,if=0 then read from ram
        CLK:IN STD_LOGIC;
        DATAIN:IN STD_LOGIC_VECTOR(7 DOWNTO 0):="10101010";----datainput for testing only
        DATAOUT:OUT STD_LOGIC_VECTOR(7 DOWNTO 0));
END ENTITY;
architecture Behavioral of RAMO is
TYPE TEMPRAM IS ARRAY (0 TO 127) OF STD_LOGIC_VECTOR(7 DOWNTO 0);----ram type creation
SIGNAL TEMP:TEMPRAM;-------ram creation
SIGNAL I:INTEGER range 0 to 127;------ram index
BEGIN
PROCESS(CLK,ADDRESS)
BEGIN
case address is----all possible options
    when "0000000"=>I<=0;
    when "0000001"=>I<=1;
    when "0000010"=>I<=2;
    when "0000011"=>I<=3;
    when "0000100"=>I<=4;
    when "0000101"=>I<=5;
    when "0000110"=>I<=6;
    when "0000111"=>I<=7;
    when "0001000"=>I<=8;
    when "0001001"=>I<=9;
    when "0001010"=>I<=10;
    when "0001011"=>I<=11;
    when "0001100"=>I<=12;
    when "0001101"=>I<=13;
    when "0001110"=>I<=14;
    when "0001111"=>I<=15;
    when "0010000"=>I<=16;
    when "0010001"=>I<=17;
    when "0010010"=>I<=18;
    when "0010011"=>I<=19;
    when "0010100"=>I<=20;
    when "0010101"=>I<=21;
    when "0010110"=>I<=22;
    when "0010111"=>I<=23;
    when "0011000"=>I<=24;
    when "0011001"=>I<=25;
    when "0011010"=>I<=26;
    when "0011011"=>I<=27;
    when "0011100"=>I<=28;
    when "0011101"=>I<=29;
    when "0011110"=>I<=30;
    when "0011111"=>I<=31;
    when "0100000"=>I<=32;
    when "0100001"=>I<=33;
    when "0100010"=>I<=34;
    when "0100011"=>I<=35;
    when "0100100"=>I<=36;
    when "0100101"=>I<=37;
    when "0100110"=>I<=38;
    when "0100111"=>I<=39;
    when "0101000"=>I<=40;
    when "0101001"=>I<=41;
    when "0101010"=>I<=42;
    when "0101011"=>I<=43;
    when "0101100"=>I<=44;
    when "0101101"=>I<=45;
    when "0101110"=>I<=46;
    when "0101111"=>I<=47;
    when "0110000"=>I<=48;
    when "0110001"=>I<=49;
    when "0110010"=>I<=50;
    when "0110011"=>I<=51;
    when "0110100"=>I<=52;
    when "0110101"=>I<=53;
    when "0110110"=>I<=54;
    when "0110111"=>I<=55;
    when "0111000"=>I<=56;
    when "0111001"=>I<=57;
    when "0111010"=>I<=58;
    when "0111011"=>I<=59;
    when "0111100"=>I<=60;
    when "0111101"=>I<=61;
    when "0111110"=>I<=62;
    when "0111111"=>I<=63;
    when "1000000"=>I<=64;
    when "1000001"=>I<=65;
    when "1000010"=>I<=66;
    when "1000011"=>I<=67;
    when "1000100"=>I<=68;
    when "1000101"=>I<=69;
    when "1000110"=>I<=70;
    when "1000111"=>I<=71;
    when "1001000"=>I<=72;
    when "1001001"=>I<=73;
    when "1001010"=>I<=74;
    when "1001011"=>I<=75;
    when "1001100"=>I<=76;
    when "1001101"=>I<=77;
    when "1001110"=>I<=78;
    when "1001111"=>I<=79;
    when "1010000"=>I<=80;
    when "1010001"=>I<=81;
    when "1010010"=>I<=82;
    when "1010011"=>I<=83;
    when "1010100"=>I<=84;
    when "1010101"=>I<=85;
    when "1010110"=>I<=86;
    when "1010111"=>I<=87;
    when "1011000"=>I<=88;
    when "1011001"=>I<=89;
    when "1011010"=>I<=90;
    when "1011011"=>I<=91;
    when "1011100"=>I<=92;
    when "1011101"=>I<=93;
    when "1011110"=>I<=94;
    when "1011111"=>I<=95;
    when "1100000"=>I<=96;
    when "1100001"=>I<=97;
    when "1100010"=>I<=98;
    when "1100011"=>I<=99;
    when "1100100"=>I<=100;
    when "1100101"=>I<=101;
    when "1100110"=>I<=102;
    when "1100111"=>I<=103;
    when "1101000"=>I<=104;
    when "1101001"=>I<=105;
    when "1101010"=>I<=106;
    when "1101011"=>I<=107;
    when "1101100"=>I<=108;
    when "1101101"=>I<=109;
    when "1101110"=>I<=110;
    when "1101111"=>I<=111;
    when "1110000"=>I<=112;
    when "1110001"=>I<=113;
    when "1110010"=>I<=114;
    when "1110011"=>I<=115;
    when "1110100"=>I<=116;
    when "1110101"=>I<=117;
    when "1110110"=>I<=118;
    when "1110111"=>I<=119;
    when "1111000"=>I<=120;
    when "1111001"=>I<=121;
    when "1111010"=>I<=122;
    when "1111011"=>I<=123;
    when "1111100"=>I<=124;
    when "1111101"=>I<=125;
    when "1111110"=>I<=126;
    when "1111111"=>I<=127;
    when others=>I<=128;
end case;
 
 
IF(CLK'EVENT AND CLK='1')THEN---when +ve edge comes
 
IF(WR='1')THEN
TEMP(I)<=DATAIN;
ELSE
DATAOUT<=TEMP(I);
END IF;
END IF;
END PROCESS;
END BEHAVIORAL;
 
Last edited by a moderator:

diju.ms said:
sorry about that...i am attaching a code with comments below...if i am executing it creates a logical error...it automatically writes data into my 0th location..even if i am giving "0000011" as the address then it writes data in both "0000000" and "0000011" locations....i am not able to find the error.please help me
Click to expand...

"it creates a logical error" doesn't mean anything to me, nor all that much to anyone else on this forum I suspect. All you tell me right now in effect is "it does not do what I want". You said "an error message is also produced". Please give the actual error message it shows you.
 

i am a beginner in this forum...so please forgive my mistakes.......
initially i declared SIGNAL I:INTEGER;so it was showing the error....after that i converted it into SIGNAL I:INTEGER range 0 to 127...then that error is gone...but now my problem is something else..if i am giving my first address location as "0000011" then it writes my data in both "0000011" and "0000000" locations....why it is happening that is my question
 

Your Heisenberg-esque lack of information puzzle intrigues me!

How did you come to this conclusion: "if i am giving my first address location as "0000011" then it writes my data in both "0000011" and "0000000" locations" ??

The reason I ask: even if you royally foul things up, it will generally not write things to TWO memory locations in 1 clock cycle? Why not? Because it would require concious effort to get that result. And random errors rarely do that sort of thing.

So again: how do you think to know it writes to those 2 locations? By which I mean: what is your test? Do you have a workbench? Something else? If you have a testbench, kindly post it plus the results (screenshot).
 

Using the info from post #7...

A signal doesn't change until a process suspends (until you hit the "END PROCESS" statement) so your signal "I" doesn't change until after the TEMP(I)<=DATAIN or DATAOUT<=TEMP(I) gets done. It's still using the last value of I it had. If you change "I" to a variable, it will change as soon as it is reassigned. So...

Move your IF(CLK'EVENT AND CLK='1') THEN back above the case address is statement.
Change SIGNAL I:INTEGER range 0 to 127 to VARIABLE I:INTEGER range 0 to 127

This should change your pointer for "I" before you read or write your data.
 

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