10 POINTS for PROVING CRC...........CALCULATION

[Guru59]

32crc


What is the exact procedure to calculate CRC

The following is a frame used in RX Block of OPENCORE 10G
data[0] = 32'h04030201;
data[1] = 32'h02020605;
data[2] = 32'h06050403;
data[3] = 32'h55AA2E00;
data[4] = 32'hAA55AA55;
data[5] = 32'h55AA55AA;
data[6] = 32'hAA55AA55;
data[7] = 32'h55AA55AA;
data[8] = 32'hAA55AA55;
data[9] = 32'h55AA55AA;
data[10] = 32'hAA55AA55;
data[11] = 32'h55AA55AA;
data[12] = 32'hAA55AA55;
data[13] = 32'h55AA55AA;
data[14] = 32'hAA55AA55;

crc = 32'hF620480D

The CRC given is from the Opencore People..........
As i try to calculate the CRC it is coming differently..............
i used the following Code for calculating CRC........
i have used CRC with input width of 8 as well 32 as well 64...............

I Desperately Need your Help.................

Thanks

 

[trendwest2]

keep your ten points !

 

[CMOS]

What polynomial are you using ? There are many polynomials for CRC calculations and results will differ for each of them.

 

[M!k]

Attached find a little quick'n'dirt program (exe & source) for your example.
The calculated CRC is 0xF620480D
The polynomial used is: x^32+x^26+x^23+x^22+x^16+x^12+x^11+x^10+x^8+x^7+x^5+x^4+x^2+x+1

Btw: I don't think that I need any points :wink:

 

[rakesh_aadhimoolam]

Hi there..............

The CRC calculator given by M!K is really good...............

Don't worry there will be many people here in saying all nonsense.....

But folks one thing to remenber is when one posts a message don't make fun of it saying "Keep your Ten points" .........

it is our site and we all are here to solve one and another problem................

if the problem cannot be solved by you,, just ask your doubts or atleast don't reply.........

Thanks for everyone who follows this...........................


i have solved your problem..............


Now what you require is a CRC32_D32 file which is fron easics...........OK

you got to input the values in reverse order...................

suppose .....data[0] = 04030201

becomes ........8040c020

The following is the code for CRC and below it is the testbench

The crc value at the end is what you require F620480D
///////////////////////////////////////////////////////////////////////
// File: CRC32_D32.v
// Date: Sat Mar 10 09:22:32 2007
//
// Copyright (C) 1999-2003 Easics NV.
// This source file may be used and distributed without restriction
// provided that this copyright statement is not removed from the file
// and that any derivative work contains the original copyright notice
// and the associated disclaimer.
//
// THIS SOURCE FILE IS PROVIDED "AS IS" AND WITHOUT ANY EXPRESS
// OR IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
// WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
//
// Purpose: Verilog module containing a synthesizable CRC function
// * polynomial: (0 1 2 4 5 7 8 10 11 12 16 22 23 26 32)
// * data width: 32
//
// Info: tools@easics.be
// https://www.easics.com
///////////////////////////////////////////////////////////////////////

module crc32_D32(DATA_IN, CLK, RESET, START, init, CRC_OUT,neg_crc,crc);

input [31:0] DATA_IN;
input CLK;
input RESET;
input START;
input init;
output [31:0] CRC_OUT;
output [31:0]neg_crc;
output [31:0]crc;

reg [31:0] CRC_OUT;
reg [31:0]neg_crc;
reg [31:0]crc;

always @(posedge CLK)
begin
if (!RESET) begin
// CRC_OUT = 32'h00;
CRC_OUT = 32'hffffffff;
end
else if (init) begin
CRC_OUT = 32'hffffffff;
// CRC_OUT = 32'h00;
end
else if (START) begin
CRC_OUT = nextCRC32_D32(DATA_IN, CRC_OUT);
neg_crc = ~ (CRC_OUT);
crc = {neg_crc[0],neg_crc[1],neg_crc[2],neg_crc[3],neg_crc[4],neg_crc[5],neg_crc[6],neg_crc[7],neg_crc[8],neg_crc[9],neg_crc[10],
neg_crc[11],neg_crc[12],neg_crc[13],neg_crc[14],neg_crc[15],neg_crc[16],neg_crc[17],neg_crc[18],neg_crc[19],neg_crc[20],
neg_crc[21],neg_crc[22],neg_crc[23],neg_crc[24],neg_crc[25],neg_crc[26],neg_crc[27],neg_crc[28],neg_crc[29],neg_crc[30],
neg_crc[31]};
end

end

// polynomial: (0 1 2 4 5 7 8 10 11 12 16 22 23 26 32)
// data width: 32
// convention: the first serial data bit is D[31]
function [31:0] nextCRC32_D32;

input [31:0] Data;
input [31:0] CRC;

reg [31:0] D;
reg [31:0] C;
reg [31:0] NewCRC;

begin

D = Data;
C = CRC;

NewCRC[0] = D[31] ^ D[30] ^ D[29] ^ D[28] ^ D[26] ^ D[25] ^ D[24] ^
D[16] ^ D[12] ^ D[10] ^ D[9] ^ D[6] ^ D[0] ^ C[0] ^
C[6] ^ C[9] ^ C[10] ^ C[12] ^ C[16] ^ C[24] ^ C[25] ^
C[26] ^ C[28] ^ C[29] ^ C[30] ^ C[31];
NewCRC[1] = D[28] ^ D[27] ^ D[24] ^ D[17] ^ D[16] ^ D[13] ^ D[12] ^
D[11] ^ D[9] ^ D[7] ^ D[6] ^ D[1] ^ D[0] ^ C[0] ^ C[1] ^
C[6] ^ C[7] ^ C[9] ^ C[11] ^ C[12] ^ C[13] ^ C[16] ^
C[17] ^ C[24] ^ C[27] ^ C[28];
NewCRC[2] = D[31] ^ D[30] ^ D[26] ^ D[24] ^ D[18] ^ D[17] ^ D[16] ^
D[14] ^ D[13] ^ D[9] ^ D[8] ^ D[7] ^ D[6] ^ D[2] ^
D[1] ^ D[0] ^ C[0] ^ C[1] ^ C[2] ^ C[6] ^ C[7] ^ C[8] ^
C[9] ^ C[13] ^ C[14] ^ C[16] ^ C[17] ^ C[18] ^ C[24] ^
C[26] ^ C[30] ^ C[31];
NewCRC[3] = D[31] ^ D[27] ^ D[25] ^ D[19] ^ D[18] ^ D[17] ^ D[15] ^
D[14] ^ D[10] ^ D[9] ^ D[8] ^ D[7] ^ D[3] ^ D[2] ^
D[1] ^ C[1] ^ C[2] ^ C[3] ^ C[7] ^ C[8] ^ C[9] ^ C[10] ^
C[14] ^ C[15] ^ C[17] ^ C[18] ^ C[19] ^ C[25] ^ C[27] ^
C[31];
NewCRC[4] = D[31] ^ D[30] ^ D[29] ^ D[25] ^ D[24] ^ D[20] ^ D[19] ^
D[18] ^ D[15] ^ D[12] ^ D[11] ^ D[8] ^ D[6] ^ D[4] ^
D[3] ^ D[2] ^ D[0] ^ C[0] ^ C[2] ^ C[3] ^ C[4] ^ C[6] ^
C[8] ^ C[11] ^ C[12] ^ C[15] ^ C[18] ^ C[19] ^ C[20] ^
C[24] ^ C[25] ^ C[29] ^ C[30] ^ C[31];
NewCRC[5] = D[29] ^ D[28] ^ D[24] ^ D[21] ^ D[20] ^ D[19] ^ D[13] ^
D[10] ^ D[7] ^ D[6] ^ D[5] ^ D[4] ^ D[3] ^ D[1] ^ D[0] ^
C[0] ^ C[1] ^ C[3] ^ C[4] ^ C[5] ^ C[6] ^ C[7] ^ C[10] ^
C[13] ^ C[19] ^ C[20] ^ C[21] ^ C[24] ^ C[28] ^ C[29];
NewCRC[6] = D[30] ^ D[29] ^ D[25] ^ D[22] ^ D[21] ^ D[20] ^ D[14] ^
D[11] ^ D[8] ^ D[7] ^ D[6] ^ D[5] ^ D[4] ^ D[2] ^ D[1] ^
C[1] ^ C[2] ^ C[4] ^ C[5] ^ C[6] ^ C[7] ^ C[8] ^ C[11] ^
C[14] ^ C[20] ^ C[21] ^ C[22] ^ C[25] ^ C[29] ^ C[30];
NewCRC[7] = D[29] ^ D[28] ^ D[25] ^ D[24] ^ D[23] ^ D[22] ^ D[21] ^
D[16] ^ D[15] ^ D[10] ^ D[8] ^ D[7] ^ D[5] ^ D[3] ^
D[2] ^ D[0] ^ C[0] ^ C[2] ^ C[3] ^ C[5] ^ C[7] ^ C[8] ^
C[10] ^ C[15] ^ C[16] ^ C[21] ^ C[22] ^ C[23] ^ C[24] ^
C[25] ^ C[28] ^ C[29];
NewCRC[8] = D[31] ^ D[28] ^ D[23] ^ D[22] ^ D[17] ^ D[12] ^ D[11] ^
D[10] ^ D[8] ^ D[4] ^ D[3] ^ D[1] ^ D[0] ^ C[0] ^ C[1] ^
C[3] ^ C[4] ^ C[8] ^ C[10] ^ C[11] ^ C[12] ^ C[17] ^
C[22] ^ C[23] ^ C[28] ^ C[31];
NewCRC[9] = D[29] ^ D[24] ^ D[23] ^ D[18] ^ D[13] ^ D[12] ^ D[11] ^
D[9] ^ D[5] ^ D[4] ^ D[2] ^ D[1] ^ C[1] ^ C[2] ^ C[4] ^
C[5] ^ C[9] ^ C[11] ^ C[12] ^ C[13] ^ C[18] ^ C[23] ^
C[24] ^ C[29];
NewCRC[10] = D[31] ^ D[29] ^ D[28] ^ D[26] ^ D[19] ^ D[16] ^ D[14] ^
D[13] ^ D[9] ^ D[5] ^ D[3] ^ D[2] ^ D[0] ^ C[0] ^ C[2] ^
C[3] ^ C[5] ^ C[9] ^ C[13] ^ C[14] ^ C[16] ^ C[19] ^
C[26] ^ C[28] ^ C[29] ^ C[31];
NewCRC[11] = D[31] ^ D[28] ^ D[27] ^ D[26] ^ D[25] ^ D[24] ^ D[20] ^
D[17] ^ D[16] ^ D[15] ^ D[14] ^ D[12] ^ D[9] ^ D[4] ^
D[3] ^ D[1] ^ D[0] ^ C[0] ^ C[1] ^ C[3] ^ C[4] ^ C[9] ^
C[12] ^ C[14] ^ C[15] ^ C[16] ^ C[17] ^ C[20] ^ C[24] ^
C[25] ^ C[26] ^ C[27] ^ C[28] ^ C[31];
NewCRC[12] = D[31] ^ D[30] ^ D[27] ^ D[24] ^ D[21] ^ D[18] ^ D[17] ^
D[15] ^ D[13] ^ D[12] ^ D[9] ^ D[6] ^ D[5] ^ D[4] ^
D[2] ^ D[1] ^ D[0] ^ C[0] ^ C[1] ^ C[2] ^ C[4] ^ C[5] ^
C[6] ^ C[9] ^ C[12] ^ C[13] ^ C[15] ^ C[17] ^ C[18] ^
C[21] ^ C[24] ^ C[27] ^ C[30] ^ C[31];
NewCRC[13] = D[31] ^ D[28] ^ D[25] ^ D[22] ^ D[19] ^ D[18] ^ D[16] ^
D[14] ^ D[13] ^ D[10] ^ D[7] ^ D[6] ^ D[5] ^ D[3] ^
D[2] ^ D[1] ^ C[1] ^ C[2] ^ C[3] ^ C[5] ^ C[6] ^ C[7] ^
C[10] ^ C[13] ^ C[14] ^ C[16] ^ C[18] ^ C[19] ^ C[22] ^
C[25] ^ C[28] ^ C[31];
NewCRC[14] = D[29] ^ D[26] ^ D[23] ^ D[20] ^ D[19] ^ D[17] ^ D[15] ^
D[14] ^ D[11] ^ D[8] ^ D[7] ^ D[6] ^ D[4] ^ D[3] ^
D[2] ^ C[2] ^ C[3] ^ C[4] ^ C[6] ^ C[7] ^ C[8] ^ C[11] ^
C[14] ^ C[15] ^ C[17] ^ C[19] ^ C[20] ^ C[23] ^ C[26] ^
C[29];
NewCRC[15] = D[30] ^ D[27] ^ D[24] ^ D[21] ^ D[20] ^ D[18] ^ D[16] ^
D[15] ^ D[12] ^ D[9] ^ D[8] ^ D[7] ^ D[5] ^ D[4] ^
D[3] ^ C[3] ^ C[4] ^ C[5] ^ C[7] ^ C[8] ^ C[9] ^ C[12] ^
C[15] ^ C[16] ^ C[18] ^ C[20] ^ C[21] ^ C[24] ^ C[27] ^
C[30];
NewCRC[16] = D[30] ^ D[29] ^ D[26] ^ D[24] ^ D[22] ^ D[21] ^ D[19] ^
D[17] ^ D[13] ^ D[12] ^ D[8] ^ D[5] ^ D[4] ^ D[0] ^
C[0] ^ C[4] ^ C[5] ^ C[8] ^ C[12] ^ C[13] ^ C[17] ^
C[19] ^ C[21] ^ C[22] ^ C[24] ^ C[26] ^ C[29] ^ C[30];
NewCRC[17] = D[31] ^ D[30] ^ D[27] ^ D[25] ^ D[23] ^ D[22] ^ D[20] ^
D[18] ^ D[14] ^ D[13] ^ D[9] ^ D[6] ^ D[5] ^ D[1] ^
C[1] ^ C[5] ^ C[6] ^ C[9] ^ C[13] ^ C[14] ^ C[18] ^
C[20] ^ C[22] ^ C[23] ^ C[25] ^ C[27] ^ C[30] ^ C[31];
NewCRC[18] = D[31] ^ D[28] ^ D[26] ^ D[24] ^ D[23] ^ D[21] ^ D[19] ^
D[15] ^ D[14] ^ D[10] ^ D[7] ^ D[6] ^ D[2] ^ C[2] ^
C[6] ^ C[7] ^ C[10] ^ C[14] ^ C[15] ^ C[19] ^ C[21] ^
C[23] ^ C[24] ^ C[26] ^ C[28] ^ C[31];
NewCRC[19] = D[29] ^ D[27] ^ D[25] ^ D[24] ^ D[22] ^ D[20] ^ D[16] ^
D[15] ^ D[11] ^ D[8] ^ D[7] ^ D[3] ^ C[3] ^ C[7] ^
C[8] ^ C[11] ^ C[15] ^ C[16] ^ C[20] ^ C[22] ^ C[24] ^
C[25] ^ C[27] ^ C[29];
NewCRC[20] = D[30] ^ D[28] ^ D[26] ^ D[25] ^ D[23] ^ D[21] ^ D[17] ^
D[16] ^ D[12] ^ D[9] ^ D[8] ^ D[4] ^ C[4] ^ C[8] ^
C[9] ^ C[12] ^ C[16] ^ C[17] ^ C[21] ^ C[23] ^ C[25] ^
C[26] ^ C[28] ^ C[30];
NewCRC[21] = D[31] ^ D[29] ^ D[27] ^ D[26] ^ D[24] ^ D[22] ^ D[18] ^
D[17] ^ D[13] ^ D[10] ^ D[9] ^ D[5] ^ C[5] ^ C[9] ^
C[10] ^ C[13] ^ C[17] ^ C[18] ^ C[22] ^ C[24] ^ C[26] ^
C[27] ^ C[29] ^ C[31];
NewCRC[22] = D[31] ^ D[29] ^ D[27] ^ D[26] ^ D[24] ^ D[23] ^ D[19] ^
D[18] ^ D[16] ^ D[14] ^ D[12] ^ D[11] ^ D[9] ^ D[0] ^
C[0] ^ C[9] ^ C[11] ^ C[12] ^ C[14] ^ C[16] ^ C[18] ^
C[19] ^ C[23] ^ C[24] ^ C[26] ^ C[27] ^ C[29] ^ C[31];
NewCRC[23] = D[31] ^ D[29] ^ D[27] ^ D[26] ^ D[20] ^ D[19] ^ D[17] ^
D[16] ^ D[15] ^ D[13] ^ D[9] ^ D[6] ^ D[1] ^ D[0] ^
C[0] ^ C[1] ^ C[6] ^ C[9] ^ C[13] ^ C[15] ^ C[16] ^
C[17] ^ C[19] ^ C[20] ^ C[26] ^ C[27] ^ C[29] ^ C[31];
NewCRC[24] = D[30] ^ D[28] ^ D[27] ^ D[21] ^ D[20] ^ D[18] ^ D[17] ^
D[16] ^ D[14] ^ D[10] ^ D[7] ^ D[2] ^ D[1] ^ C[1] ^
C[2] ^ C[7] ^ C[10] ^ C[14] ^ C[16] ^ C[17] ^ C[18] ^
C[20] ^ C[21] ^ C[27] ^ C[28] ^ C[30];
NewCRC[25] = D[31] ^ D[29] ^ D[28] ^ D[22] ^ D[21] ^ D[19] ^ D[18] ^
D[17] ^ D[15] ^ D[11] ^ D[8] ^ D[3] ^ D[2] ^ C[2] ^
C[3] ^ C[8] ^ C[11] ^ C[15] ^ C[17] ^ C[18] ^ C[19] ^
C[21] ^ C[22] ^ C[28] ^ C[29] ^ C[31];
NewCRC[26] = D[31] ^ D[28] ^ D[26] ^ D[25] ^ D[24] ^ D[23] ^ D[22] ^
D[20] ^ D[19] ^ D[18] ^ D[10] ^ D[6] ^ D[4] ^ D[3] ^
D[0] ^ C[0] ^ C[3] ^ C[4] ^ C[6] ^ C[10] ^ C[18] ^
C[19] ^ C[20] ^ C[22] ^ C[23] ^ C[24] ^ C[25] ^ C[26] ^
C[28] ^ C[31];
NewCRC[27] = D[29] ^ D[27] ^ D[26] ^ D[25] ^ D[24] ^ D[23] ^ D[21] ^
D[20] ^ D[19] ^ D[11] ^ D[7] ^ D[5] ^ D[4] ^ D[1] ^
C[1] ^ C[4] ^ C[5] ^ C[7] ^ C[11] ^ C[19] ^ C[20] ^
C[21] ^ C[23] ^ C[24] ^ C[25] ^ C[26] ^ C[27] ^ C[29];
NewCRC[28] = D[30] ^ D[28] ^ D[27] ^ D[26] ^ D[25] ^ D[24] ^ D[22] ^
D[21] ^ D[20] ^ D[12] ^ D[8] ^ D[6] ^ D[5] ^ D[2] ^
C[2] ^ C[5] ^ C[6] ^ C[8] ^ C[12] ^ C[20] ^ C[21] ^
C[22] ^ C[24] ^ C[25] ^ C[26] ^ C[27] ^ C[28] ^ C[30];
NewCRC[29] = D[31] ^ D[29] ^ D[28] ^ D[27] ^ D[26] ^ D[25] ^ D[23] ^
D[22] ^ D[21] ^ D[13] ^ D[9] ^ D[7] ^ D[6] ^ D[3] ^
C[3] ^ C[6] ^ C[7] ^ C[9] ^ C[13] ^ C[21] ^ C[22] ^
C[23] ^ C[25] ^ C[26] ^ C[27] ^ C[28] ^ C[29] ^ C[31];
NewCRC[30] = D[30] ^ D[29] ^ D[28] ^ D[27] ^ D[26] ^ D[24] ^ D[23] ^
D[22] ^ D[14] ^ D[10] ^ D[8] ^ D[7] ^ D[4] ^ C[4] ^
C[7] ^ C[8] ^ C[10] ^ C[14] ^ C[22] ^ C[23] ^ C[24] ^
C[26] ^ C[27] ^ C[28] ^ C[29] ^ C[30];
NewCRC[31] = D[31] ^ D[30] ^ D[29] ^ D[28] ^ D[27] ^ D[25] ^ D[24] ^
D[23] ^ D[15] ^ D[11] ^ D[9] ^ D[8] ^ D[5] ^ C[5] ^
C[8] ^ C[9] ^ C[11] ^ C[15] ^ C[23] ^ C[24] ^ C[25] ^
C[27] ^ C[28] ^ C[29] ^ C[30] ^ C[31];

nextCRC32_D32 = NewCRC;

end

endfunction

endmodule

-----------------------------------------------------------------------------------


TESTBENCH

`include "32crc.v"

module crc_tb();

reg [31:0] DATA_IN;
reg CLK;
reg RESET;
reg init;
reg START;
wire [31:0] CRC_OUT;
wire [31:0]neg_crc;
wire [31:0]crc;

crc32_D32 u1(DATA_IN, CLK, RESET, START, init, CRC_OUT,neg_crc,crc);

initial
CLK <= 1'b1;
always
#5 CLK <= ~ CLK;

initial
begin
RESET <= 1'b0;
#10 RESET <= 1'b1;
end


initial
begin
init <= 1'b0;
#10 init <= 1'b1;
#10 init <= 1'b0;
end

initial
begin
START <= 1'b0;
#30 START <= 1'b1;
#150 START <= 1'b0;
end

initial
begin
DATA_IN <= 32'h00000000;
#30 DATA_IN <= 32'h8040c020;
#10 DATA_IN <= 32'ha0604040;
#10 DATA_IN <= 32'hc020a060;
#10 DATA_IN <= 32'h007455aa;
#10 DATA_IN <= 32'hAA55AA55;
#10 DATA_IN <= 32'h55AA55AA;
#10 DATA_IN <= 32'hAA55AA55;
#10 DATA_IN <= 32'h55AA55AA;
#10 DATA_IN <= 32'hAA55AA55;
#10 DATA_IN <= 32'h55AA55AA;
#10 DATA_IN <= 32'hAA55AA55;
#10 DATA_IN <= 32'h55AA55AA;
#10 DATA_IN <= 32'hAA55AA55;
#10 DATA_IN <= 32'h55AA55AA;
#10 DATA_IN <= 32'hAA55AA55;
end
endmodule





Enjoy............................