assign certain pin location in VHDL code

attribute pin assign in vhdl

Can I use certian VHL attribute to direct the synthesizer to assign certain Input or output pin to certain pin location on the target FPGA ?

Hi !

You have to use ucf file to assign pin location for your design.

example:

NET "adc<0>" LOC = "T11";
NET "adc<1>" LOC = "M11";
NET "adc<2>" LOC = "P10";

you can also use this file to create timing spec. and location spec.

Good luck, Bart

if you use xilinx you can use this sintax in entity declaration

attribute loc: string; (one time)
attribute loc of <name of signal> : signal is "<pin>";

Bye.
G.

Dear tpl71
thanks for your support. I tried the solution you specify and it done well with single line signal. I tried to treat a bus with the same idea by writing

attribute Location of Address_Bus_H(0) : signal is "112";

but I get an error message
"C:/~/adapter.vhd", line 65: Syntax Error near '('.

did you face this problem ?

you can also use constraint editor or pace in ISE

but if your ISE is 4.2version

you'd better use a texteditor to writer UCF

I tried to treat a bus with the same idea by writing

attribute Location of Address_Bus_H(0) : signal is "112";

but I get an error message
"C:/~/adapter.vhd", line 65: Syntax Error near '('.

did you face this problem ?[/quote]

For a bus you can try a list of pins instead of one pin at at time

See **broken link removed** for the syntax

and below (forget the XC_ in XC_LOC, that's old)

entity iob_loc_ex is
port (CLK : in STD_LOGIC;
A, B : in STD_LOGIC_VECTOR (3 downto 0);
O : out STD_LOGIC_VECTOR (3 downto 0));

attribute xc_loc : string;
attribute xc_loc of CLK : signal is "P13";
attribute xc_loc of A : signal is "P19,P20,P23,P24";
attribute xc_loc of B : signal is "P25,P26,P27,P28";
attribute xc_loc of O : signal is "P48,P49,P50,P51";
end iob_loc_ex;
**broken link removed**

The idea is feasible. But it is a kind of poor coding style, anyway. This get the codes un-reusable.