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cpld as a display controller

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shraddha

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i want to interface lcd module (320×240 display having resolution of 5×7character)
with microcontroller AT89s52.i am using XC9536xl vqfp 44pin cpld as a display controller. address generation for video ram is done by microcontroller as well as by cpld. 3 time sequence signals clk pulse,frame pulse & new row initialisation pulse are generated by cpld & data will be shifted to display through internal shift registers of cpld but in 4bit manner coz lcd display is of 4 bit.
can anyone tell me how cpld's internal shift registers is used means waveform of those? & if possible vhdl code for it
 

If I remember the architecture of Xilinx CPLD correctly, there are no dedicated internal shift registers. This device has, I believe, 36 macro cells. Each macro cell has an AND gate array and a single flip-flop. Therefore, The most you have internally would be 36 total flops with which to build your state machines and your shift registers.

Short answer is, I think you need a bigger part! I do not think you can cram the needed logic into a part that size. For CPLD designs I would suggest using schematics as you can directly instantiate each flop. Using VHDL can be tricky as the compiler may infer extra flops that end up eating your resources.
 

hi benjo,
now i dont want to use internal shift regi.instead of that i want to generate address of row counter & column counter by cpld with the three abovesaid timing signals.so nw i'll write code for counter.
how do i proceed for that?
 

Hello Shraddha,

I commited once a project based on CPLDs and a monochrome LCD.
The draft schematic and the VHDL source is available here: **broken link removed** .

You can study this as an example and adjust it to your needs.
VHDL code contains some counters, multiplexers and registers, so you can use them at will.

Regards, yego
 

Xilinx has an app note on an LCD controller in a CoolRunner CPLD. This can be found at:

**broken link removed**

Study this doc and you should get an idea on how to proceed. The core piece is that you have to write a state machine to generate the required signals.
 

Dear Yego,
Artical on this side is not in english.....so i cud not read it....plz suggest me

Regards,
shraddha

Added after 7 minutes:

hi Benjo,
i have gone through coolrunner cpld document......but i want to use only XC9536 family.....plz suggest me

regards,
shraddha
 

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