Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Mismatch analysis of bandgap

Status
Not open for further replies.
A

andrabi

Newbie level 4
Joined
May 2, 2006
Messages
7
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,340
bandgap vt mismatch

Does any body have papers on mismatch analysis of apamp based bandgap...

thanks
 

thanks a lot ..i already had the paper.. but this doesnt analyse the conventional bandgap with opamp an all..thanks anyway
 

hi, If you want to analyse the mismatch of Band gap, the mismatch parameters from the foundry are needed.

For example, the 3.3V PMOS Vtsat mismatch parameter is 4.9mV*um. If you want to know the Vt mismatch of a PMOS current mirror with size of W=10um, L=5um, the Vt mismatch equals to 4.90mV*um/sqrt(10um*5um)=0.693uV.

Normally the mosfet mismatch expresses as: sigma=slope/sqrt(W*L), the slope has a unit of mV*um.
the resistor mismatch expresses as: sigma=slope/sqrt(Weffe*Leffe), the slope has a unit of %.W: resistor width, Weff = W-ΔW, L: resistor length; Leff = L-ΔL.

With these two equations and the mismatch parameters, you can calculate the vt mismatch and resistor mismatch of you circuitry.
 

lunren said:
hi, If you want to analyse the mismatch of Band gap, the mismatch parameters from the foundry are needed.

For example, the 3.3V PMOS Vtsat mismatch parameter is 4.9mV*um. If you want to know the Vt mismatch of a PMOS current mirror with size of W=10um, L=5um, the Vt mismatch equals to 4.90mV*um/sqrt(10um*5um)=0.693uV.

Normally the mosfet mismatch expresses as: sigma=slope/sqrt(W*L), the slope has a unit of mV*um.
the resistor mismatch expresses as: sigma=slope/sqrt(Weffe*Leffe), the slope has a unit of %.W: resistor width, Weff = W-ΔW, L: resistor length; Leff = L-ΔL.

With these two equations and the mismatch parameters, you can calculate the vt mismatch and resistor mismatch of you circuitry.
Click to expand...

when simulation, I usually consider 3-sigma of mismatch, which mentioned by Lunren multiply a factor 3.
Just FYI.
 

Hey,why dont you download the paper "Matching of MOS Transistors" by Pelgrom. It is very useful and is also available somewhere on the board
 

thanks alot for the help..but then wat i exactly want is the expression for the mismatch effect in the o/p current or voltage in the bgap due to transistors..and then i ll put the values from foundry to get the spread
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top