Simulating the effect of control voltage ripple on the VCO

I am using Spectre RF in Cadence. I have the following question:

In a PLL the control voltage that comes form the charge pump (even after filtered by the Loop filter), it is not stable but has some ripple with a period equal to the reference frequency (50MHz in my case). From simulations that i have done on a charge pump that i have designed, the control voltage has a triangle shape with a ripple of 2-4mv.

What i want to investigate, is the effect of that ripple on the VCO, and more specifically on the phase noise and the output spectrum.

If i set the control voltage of the VCO as a triangle voltage source with F=50MHz)and perform the PSS analysis, i get the following message "V0 is a periodic input signal , which is inconsistent with autonomus system"

What am i doing wrong?

Not sure if there is a solution, or this is routinely done, but ripple gives rise to spurs and phase noise is not directly affected by it unless ..... read on

run a dft using calculator on the vco output while the PLL is locked. This means clipping the waveform when it is locking. You can see where the spurs are and their level in dBc.

If these spurs fold back, you will have a phase noise problem, but not one that you can simulate in a reasonable time, at least not with the PSS tool.

Phase noise may be very good on your VCO, but jitter is basically the integral of the area under that curve. so the vco with a very good phase noise may have deterministic jitter (or systematic spurs)