Problem about the pole/zero of opamp

Hi all!
i am a fresh man of analog designer, i have a problem to ask!
In my knowledge, if there are two ways between the input and output, a zero is arise. Now i am designing a folded cascode amplifier(as below). i use the '.pz' to simulate the all zeros and poles. From the log results, i found several zeros, and i don't know where the zeros come from!
so i want to know how to expect the zeros in the amplifiers! Should i consider al l the parasitic cap and then calculate the transfer function?

By the way, in the folded cascode amplifier, i found a dominate pole, and several higher poles and zeros. what fuzzled me is every higher poles is equally with the corresponding zeros. So in the amplitude vs freq bode diagrams, the amplitude is decrese at the dominate pole and then don't change after a higher pole until the frequency reach seral G. SO i want to know how the results arise!!

Last, thanks a lot!!

1. I don't understand the function of I10, which is NMOS at the output stage input node.

2. you need upload the pz plot and frequency response plot.

3. usually, higher pole and zeros are induced by the parasitic caps on the signal path

Ive never relied on the .pz command , I would just make a mag and phase plot
and find the poles/zeros looking at the plots.. I think even in the Hspice
manual it recommends not using the .pz command.

First thanks all the ansers!

Then i want to know how i ansys the zero in the circuts! Which node should i ansys

its zero!

Hi
I'm a newbi designer too, but this items would help you:

--Look for documentation (Analysis and Design of Analog Integrated Circuits. Gray and Meyer, Chapter about compesation)

--When you have a capacitor between any node and the output node you get at least one zero in any frequency (for example if the capacitor is between output node and groud the frequency is infinite), any way, an important point is how the bandwith and phase margin is afected.

--What does I16 do ????? (the NMOS at the output stage) This one give a lot of capacitors at the output.

--If you want a formal analisys you have to get the transfer function. But it common form is almost the same to two stage opamp.