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[SOLVED] [Moved] Code based on simulaton

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Kuba92

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Hi!

A am newbie with VHDL code programming for FPGA and I need some help.

I have simulation described on the blackboard. Here are described two variants:
11870913_883308235090498_1901400258732223998_n.jpg




Is it possible to write a code to FPGA based only on this and PINs arrangement?
Could you tell me as simple as it possible how to make it?
What type of system does it show? (counter, register, ...?)
Does in each variants there are 3 or 4 signals (what does DATA signal connected to?)



I work with Nexys™3 Spartan-6 FPGA Board.


Sorry if I wrote it in a wrong place but, it is very important for me.

Thank for reply!
 

I'm sure it sounds be possible. It just needs some hdl code and away you go.
 

The wave-forms look very similar to I2S bus transactions. But there is no info on whether a I2S master or slave needs to be designed. Any type of bus will have a master and as slave.

"Is it possible to write a code to FPGA based only on this and PINs arrangement?"
First question to you: The person describing this on the white-board, did he/she not tell you what logic is creating such a waveform? In order to write the HDL you need to have this info.

"What type of system does it show? (counter, register, ...?)"
It just shows the nature of a bus transaction...nothing else!

"Does in each variants there are 3 or 4 signals (what does DATA signal connected to?)"
Again you need to ask this to the person who has assigned you such a task!

"I work with Nexys™3 Spartan-6 FPGA Board."
No problem!
 

I have done it. Topic can be closed.
 

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