Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

high to low voltage CMOS level shifter circuit

Status
Not open for further replies.

viperpaki007

Full Member level 5
Joined
Jul 2, 2008
Messages
270
Helped
11
Reputation
22
Reaction score
8
Trophy points
1,298
Location
Finland
Activity points
3,395
Hi,

I am looking for a high to low level CMOS level shifter. Can somebody refer some circuit.

regards
 

Hi,

a more detailed description please.

Voltage levels, supply voltage, speed, logic diagram.. all you can provide.

Klaus
 

My input clock signal has 3.6V and 1.8V logic and i need to convert this clock to 1.8V and 0V logic. Clock frequency is around 350MHz.
 

Hi,

Do you mean input signal: high = 3.6V, low = 1.8V?
==> don't know any Cmos family with low = 1.8 V.
If this really is your signal, then a high speed comparator with logic level output may help.

For 3.3V LVCmos to 1.8V LVCmos there are buffers with 1.8V Vcc and 3.3V input tolerance.

Klaus
 

It seems that you need two level shifters:

1st one converts the signal to a 3.6 - 0 V logic signal. You can use cross-coupled NMOS level shifter.
2nd would be the same but PMOS version to bring the 3.6 V high level back to 1.8 V.

I should advice you that the 1st level shifter's transistor should have a breakdown voltage of 3.6 V, or you have to be creative using 1.8 V transistors by stacking them so each one see a maximum of 1.8 V.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top