Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

a negative voltage is added on a BJT's base

Status
Not open for further replies.

luciforlove

Member level 1
Joined
Sep 12, 2012
Messages
41
Helped
3
Reputation
6
Reaction score
3
Trophy points
1,288
Activity points
1,535
there is a LNA schem,when it doesnot work,a negative voltage is added on a BJT's base ,then it work on cut-off region,why?is it for prevent big singal from damaging LNA?
 

there is a LNA schem,when it doesnot work,a negative voltage is added on a BJT's base ,then it work on cut-off region,why?is it for prevent big singal from damaging LNA?

as you said that when negative voltage is not present then the LNA doesn't work, but when it is added it works, that is because the without the -ve supply the transistor might be unbiased and with the -ve supply connected it might be biased to cutoff region, look into the output characteristics graph of the transistor and based on that you can choose the operating point, now look at your circuit what all components that you have connected at the three terminals of your transistor, which mode is it being operated(CB, CC, CE) and based on the above things we can predict precisely what is its operation.

below is a link to a simulation of a CE amplifier, have look at it.

https://www.indiabix.com/electronics-circuits/common-emitter-amplifier/
 

sorry i did not say my question clearly, i mean when LNA does not work,a negative voltage is added on CE amp'base,why?is it for prevent big singal from damaging LNA?
 

The reason of the negative bias is to increase the input/output isolation when the LNA is in OFF state.
In BJT this helps a little bit, but FET's provides better isolation in reverse bias state.
 

Sorry @luciforlove,
That's my bad i misunderstood the question.
 

The reason of the negative bias is to increase the input/output isolation when the LNA is in OFF state.
In BJT this helps a little bit, but FET's provides better isolation in reverse bias state.
thank you sir,that make sense
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top