Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Cadence tsmc 130nm (question) !

Status
Not open for further replies.
E

eng-a-hesham

Junior Member level 2
Joined
Oct 14, 2011
Messages
23
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,427
I'm using Cadence with tsmc 130nm technology file ... and it's my first time ... now I'm facing a weird problem i have built a very simple circuit (an NMOS with its drain connected to the gate in series with an ideal current source between VDD and GND) I'm trying to apply the famous saturation current formula to get the process parameters (uCox & lamda )

the problem : the saturation current formula is not applicable .. and it gives wrong results !!!
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top