Looking for FSK/QPSK Verilog or VHDL code

dsp code qpsk

Hi,

Can anyone provide me Verilog/VHDL code for FSK or QPSK?

Thanks
FNK

qpsk dsp

Are you talking about DSP code to produce an array of data to go out on a DAC?

fsk + fpga

FSK is Frequency Shift Keying and QPSK is another encoding technique.

fsk(frequency shift keying) + fpga

Those are analog signals. FPGA are not well-suited for analog. You yould need external DAC/ADC. However, you could implement the DAC internally, with minimal external components, as a delta-sigma DAC (sorry, I originally wrote delta-epsilon...).

The application is more suited for a DSP. Though, it may be possible to implement in FPGA, this may be pretty complicated. FSK would be easier than QPSK. In both cases, you could, I guess, generate a sine wave at different frequency/phase, and select between the wave, and amplitudes, to generate. However, decoding QPSK is another story, this is really something that is usually done in an analog fashion, or with advanced signal processing.

Re: FSK/QPSK

you can do de fsk whit no problem but you can use one ad/da to have less noise or you can just put the square wave and put one very good passband filter in that ...

Re: FSK/QPSK

FSK/QPSK This is more than synthesizable Verilog/VHDL can do.
These two modulations require both digital and analog, so you need
to provide information on your platform, for example, Bluetooth,
WLAn or what?

On either of them, digital portion of FSK/QPSK modulations are fairly simple.

FSK, go google for Gaussian filter. There are large number of papers
online that does binary FSK modulation in Bluetooth.

QPSK, all I know is a two fifo, and the analog circuit does rest of the job.

Re: FSK/QPSK

FSK is Frequency shift keying and is an old technique for sending digital info on an analog channel. Normally it involves 2 frequencies one of which would represent a 0 and the other a 1. It is normally syncronous with clock extraction (Note clock extraction requires some digital encoding on the tx end.)

QPSK is quadrature phase shift keying which encodes 2 bits at a time into one of 4 phase positions on a carrier wave it is used for the same purpose as FSK but in general a higher bitrate can be achived on a channel of a given bandwidth. Clock extraction is normal again.

QPSK is often used to describe keying using more that 4 phases also.

QAM is Quadrature amplitude modulation and is generally used to describe many phase and amplitude combinations (I cant remember but perhaps 64 for a 14.4k modem.) A fair amount of DSP work needs to be done to encode/decode.

Depending on how simple you intend to go will decide on if you can achive this with a FPGA, almost certainly you will need a DAC.

What is the channel bandwidth that you have? What is the baud rate that you are trying to achive? what FPGA hardware resources do you have?

A lot of FPGA's now have quite a few multipliers etc in them allowing them to do quite a bit of DSP. Also probably you have only a low baud rate (ie less that 100k) so it should be not too much of a problem.