Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Urgent...Cant use '*' for multiplication in VHDL

Status
Not open for further replies.
J

jkchaw

Newbie level 2
Joined
May 18, 2010
Messages
2
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Location
Malaysia
Activity points
1,297
after including the necessary library, i was still getting syntaz error when using '*' or '/'
can anybody tells me why?
 

hi, i am facing the same problem... I would like to solve modular multiplication. u = (x*y) mod p

However, the * is nt recognized by the compiler eventhough i have included all relevant ieee library.

How to solve this issue???
 

what libraries are you using?

and what compiler?
 

Depending on the referenced libraries, the "*" operator is only recognized for specific data types, e.g. signed, unsigned or integer.
The support for "/" operator is generally limited and vendor dependant.
 

    J

    jkchaw

    Points: 2
    Helpful Answer Positive Rating
Make sure that you dont use too many libraries. For example if you use numeric_std and std_logic_arith together in the same code, you may get errors since * is defined in both libraries and xilinx s/w will get confused.

--vipin
https://vhdlguru.blogspot.com/
 

vipinlal said:
Make sure that you dont use too many libraries. For example if you use numeric_std and std_logic_arith together in the same code, you may get errors since * is defined in both libraries and xilinx s/w will get confused.

--vipin
https://vhdlguru.blogspot.com/
Click to expand...

There will be no confusion. numeric_std and std_logic_arith both declare signed and unsigned types, therefore these names and any functions on them become invisible to the compiler without specifying where objects/functions come from. This way there is never any confusion over which function you are using.

Code: 
signal a, b : ieee.numerc_std.unsigned(7 downto 0);
signal c, d : ieee.std_logic_arith.unsigned(7 downto 0);
signal E  : unsigned; --will throw an error because it doesnt know which unsigned to use
signal R1 : ieee.numeric_std.unsigned(15 downto 0);
signal R2 : ieee.std_logic_arith.unsigned(15 downto 0);

.........

R1 <= a ieee.numeric_std.* b;  --uses the numeric_std version of *

So the moral is - use one or the other, never both (numeric_std is recommended as it is a real standard, not a defacto standard. It has more functionality too)
 

    J

    jkchaw

    Points: 2
    Helpful Answer Positive Rating
thanks for all of you for the info...
bc initially i declared the signal as std_logic, so the Quatus II compiler nt accepted the '*' and '/' operations... Using unsigned declaration can solve the problem.
 

Hi FvM, about the '/' operation. what do you mean by limited or vendor specific?
i am using Quatus II for vhdl coding, is it supporting? i have checked the library inside my program, it has the operation...

Hi TrickyDicky and Vipinlal,
Thank for u mention on not using some many libraries, bc i still new to vhdl, so nt sure the use of library...
 

With ieee.numeric_std, Q.uartus can "infer" a divider MegaFunction for signed and unsigned data type from "/" operator. See:

There may be reasons to instantiate a MegaFunction directly to have a better control of design pipelining.
 

    V

    Points: 2
    Helpful Answer Positive Rating
jfm9513 said:
Hi FvM, about the '/' operation. what do you mean by limited or vendor specific?
i am using Quatus II for vhdl coding, is it supporting? i have checked the library inside my program, it has the operation...

Hi TrickyDicky and Vipinlal,
Thank for u mention on not using some many libraries, bc i still new to vhdl, so nt sure the use of library...
Click to expand...

There is no '/' function inside the std_logic_arith/signed/unsigned package. You have to use the numeric_std package (given your response, I guess you are using), and used signed/unsigned types. Most synthesisors should now support the / function, and Quartus does (especially handy for doing bitshifts). I would avoid divides as much as possible though as they use a lot of logic on the chip.
There are several ways to avoid a divide:

1. If your inputs are small enough (like 8/9 bits in small FPGAs, you can probably get away with more bits in larger FPGAs.) use a look-up table instead. It gets your divide done in minimal logic and a small amount of memory, so you can probably run your clock faster than a normal divider.

2. Get a processor to do the divide for you and provide a 1/n value that you can put into a multiplier instead of a divide. This is not usually practical when both inputs change on every clock. This is best used for systems where 1 input changes infrequently (like filter co-efficients).

3. '/' is fine (and very useful) if you're simply doing bitshifts (ie. / 2^n). The compiler knows what you're doing and just drops the bits you dont need anymore (this is almost free in terms of logic).
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top