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Questions about Chipscope clock

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wakaka

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Chipscope clock

Hi all. I'm trying to capture some data and clock signal of a design.

Below is my code.

Code: 
wire [35:0] control0;

icon i_icon ( .control (control0));

ila i_ila
  (
   . control(control0),
   . clk(clk),
   . trig0({data0, data1, data2,data3,data4,data5,data6,clk})
   );

when i run the chipscope analyzer, I'm able to capture the datas. But i cant capture the clk signal. is there anyway to capture the clock signal as well?
 

Re: Chipscope clock

not like you put it you will need your sampling clock to be in higher rate then the clock you try to sample. x4 for asynchronous sampling at list.
 

Re: Chipscope clock

i earlier tried for it,but found clock can not be sampled,with the same clock.this i found in docs of xilinx.
 

Re: Chipscope clock

hi,

In fact the Chipscope only makes state analysis!

When you are using the CLK signal for trigger/clock you can't see it!

You must have an additional signal with higher frequency (for example x2 or more) and this signal is use for the chipscope trigger/clock, now u can see your CLK signal.
For this you can instantiate a DCM (Data Clock Manager).

Added after 3 hours 8 minutes:

hi,

In fact the Chipscope only makes state analysis!

When you are using the CLK signal for trigger/clock you can't see it!

You must have an additional signal with higher frequency (for example x2 or more) and this signal is use for the chipscope trigger/clock, now u can see your CLK signal.
For this you can instantiate a DCM (Data Clock Manager).
 

Chipscope clock

thanks, got it
 

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