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sample and hold circuit diagram

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tweedle

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dear friends

can any one provide me with a sample and hold circuit diagram with appropriate switches. i have got one on the net but its not giving proper result. i am simulating it in pspice.i have got it at **broken link removed**.
94_1183300401.gif


if i use the 1 M resistor after the diodes then the output after the 1st buffer stage itself is wrong.
if i dont use it then also the sample and hold is not working properly.

pls help .urgent

thanx a lot in advance[/img]
 

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