Design of a AC power load by a controllable current source

Code Verilog - [expand]
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// VerilogA for power_grid_simulation, load_cpq, veriloga
 
`include "constants.vams"
`include "disciplines.vams"
 
module load_cpq(vin);
input vin;
electrical vin;
parameter real fc=50.0;
parameter real P=0.9;
parameter real Q=0.3;
real Amax= -10**9;
real Amin = 10**9;
real Vamp = 1.0;
real Vphi = 0;
real Iamp = 2*sqrt(P*P+Q*Q)/Vamp;
real Iphi = Vphi-atan(Q/P);
 
real vin_value;
integer sample_per_cycle = 100;
 
always #(1/(sample_per_cycle*fc))
begin
    vin_value=V(vin);
    if ($realtime()%(1/fc))
    begin
        Vamp =(Amax-Amin)/2;
        Vphi = acos(V(vin)/Vamp);
                Iamp = 2*sqrt(P*P+Q*Q)/Vamp;
                Iphi = Vphi-atan(Q/P);
                Amax = -10**9;
        Amin = 10**9;
    end
    else
    begin
        Amax=(vin_value>Amax)?vin_value:Amax;
        Amin=(vin_value<Amin)?vin_value:Amin;
    end
end
 
analog 
begin
I(vin) <+ Iamp*cos(2.0*`M_PI*fc*$realtime()+Iphi);
end
 
endmodule