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VerilogA code for Ideal switch

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ashrafsazid

ashrafsazid

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Does anyone has an example of transmission gate (or MOS switch) verilogA code? Please provide an example you have. I already tried this but does not work.

Code: 
module simple_switch(in, out, tp);

input		in, tp;

output		out;

electricl	in, out, tp;

parameter	real	vth =0.4;

real	vout
analog begin

if (V(tp) >= vth) begin
	vout = V(in);
	end else vout = 0;
	
	V(out) <+ vout;
end
endmodule
 

Should "electricl" be "electrical"?

"Doesn't work" is about as useful as "Wahhh!!!". Failure
signature = ???
 

V(in, out) <+ 0.0; //for on state
I(in, out) <+ 0.0; //for off state

You also can describe smooth switch by tanh().

You can see many examples in "ahdlLib" and "bmslib", if you have Cadence dfII.
 
Last edited:
tanh() has the very nice attribute that it is limited,
smooth and cannot blow up. It can be used to
approximate exponential behaviors in its transition
region without making a numerical mess.

Your switch really should contain finite "on" and
"off" conductances, so as to not cause said blowup
behaviors at reasonable current ("off") or voltage
("on") forcing. You have to bear in mind that the
final SPICE solution is not the only place you'll step.
In the middle of your Newton-Raphson trek you
would very much like there not to be land mines
and tiger pits. It's a long way to the beach.

Similarly it might be best if the tp transfer function
was not hyper-abrupt. Otherwise you might have the
unfortunate result of toggling your way to "timestep
too small" every time you flip the switch. The smooth
leisurely tanh(), used to convert tp position to a
conductance (range from slightly more than zero
to slightly less than infinity) and exporting a current
rather than asserting / de-asserting that two nodes
are suddenly and exactly equal, would be much easier
on the solver.

There is a site out there with a large amount of veriloga
"stuff" to rip off. It may be designersguide.org, but I
am not sure I'm remembering correctly.
 
Similarly it might be best if the tp transfer function
was not hyper-abrupt
Click to expand...

If I use transition filter for tp ( its a clk generated by another block), still is there risk to have hyper-abruption?
 

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