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[SOLVED] how to convert a C code to verilog or VHDL?

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hamidkavianathar

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Hi guys
I have written a C code for a micro controller and now I want to convert it to VHDL or verilog. I am familiar with verilog and vhdl. my problem is how I should convert a totally sequential code to verilog/vhdl code. for example in a loop, I am reading 128 registers with spi interface. could tell me, what I should do? I don't want to use processors like microblaze.
thank you
 

As you say state to be familiar with hardware description languages, you'll know that a loop construct generates parallel logic rather than a sequence in time.

The appropriate means to generate a timed sequence in HDL is a state machine. You'll probably have at least two hierarchical state machines, a lower level controlling the SPI frame and a higher level performing the register read sequence.
 
Hi guys
I have written a C code for a micro controller and now I want to convert it to VHDL or verilog. I am familiar with verilog and vhdl.

Seems to me you might be familiar with the language features, the syntax, etc. What you seem to be missing is the understanding of digital hardware design. Can you draw a circuit of the SPI connected to the 128 registers and block out all the detailed hardware design of such a function? If you can do that then writing the VHDL/Verilog description of such a circuit is simple.
 
Hi guys
I have written a C code for a micro controller and now I want to convert it to VHDL or verilog. I am familiar with verilog and vhdl. my problem is how I should convert a totally sequential code to verilog/vhdl code. for example in a loop, I am reading 128 registers with spi interface. could tell me, what I should do? I don't want to use processors like microblaze.
thank you

state machine. create a reg that holds the address. at every clock cycle, perform a read and update the address. are you sure you are familiar with digital design?
 
Realistically, you would use a SPI controller and a small state machine. The SPI controller might even be one that was designed to be used by a microcontroller. That is up to how much time you want to put into finding a SPI controller that matches your exact requirements vs how much time you want to spend writing your FSM to a controllers requirements vs how much time you want to put into re-writing/verifying a SPI controller. There might be some area/performance differences, but SPI controllers should be fairly small.

At that point, you'd have a state machine with an idle state, one or more "read from SPI" states, zero or more "validate and output" states, and 1-2 states for increment and loop termination check. For example, a uC based SPI controller might use a FSM with a "write address register", "write data register", "write control register", "write status register", "read status register", "status polling loop", "read data register" flow.

if the SPI controller has interrupts, these might be more useful. Also, depending on the interface, you might have multiple states for "read/write * register".
 

Hi,

An SPI interface mostely consists of two shift registers.
I think writing the state machine for it takes less time than going through this thread.

Klaus
 

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